• Transparent Superpages for FreeBSD on ARM
    “This content was initially posted 27 September 2013 on blogs.arm.com” Contemporary ARM® architecture (ARMv7, the upcoming ARMv8) offers advanced CPU features like MMU, multi-level cache, TLB, multi core...
  • Invoking application from Hypervisor in ARM V8
    Hi Experts, Does it possible to invoke the application running in EL0 directly from the hypervisor EL2 without giving control to EL1 ? Regards, Techguyz
  • STREX always clears the exclusive access tag
    Hello everybody, Section 18.8 Exclusive access of Cortex-A Series Programmer's Guide says the following: STREX can be considered as a conditional store. The store is performed only if the physical address...
  • Hypervisor for Arm Cortex A9
    Hello all, I am currently working on a project with a SoC Zynq development board (Cora Z7) that has two Arm A9 processors. I would like to use a hypervisor in order to partition the software. I have...
  • ARMv8: strongly ordered memory and exclusive access
    We are developing a bare metal secure OS on a NXP LS1043a board, with a Cortex A53 v8 core. While debugging some issue with DMA, I decided to switch all kernel mapping from Normal cacheable to Strongly...