• MakeUnique Transaction (ACE protocol)
    Hi., As we know that there is a MakeUnique transaction in ace protocol, can anyone tell me how we can initiate this transaction..? I mean what is the respective signal in AXI4/ACE that allows us to set...
  • ReadClean transaction (ACE protocol)
    Hello everyone, Can any one explain me why there is a case where a start state in Unique Dirty leads to a final state in Unique Dirty for a readClean transaction in ACE protocol. This transaction requires...
  • CA72 transactions IDs
    In the TRM of CA53, I see some descriptions of the encodings for AWIDM and ARIDM, and it's quite clear to distinguish Read & Write transactions from different cores. But in CA72, I can't find such descriptions...
  • ACE - ReadNoSnoop transaction
    In ACE Specifications - ARM IHI 0022E, in ReadNoSnoop transactions how is the following other state of cacheline given on page number C4-197 transaction permitted : Start State  - ShareClean RRESP[3]...
  • AXI4: Unaligned read transactions
    Hi guys, I'm new to the AXI ecosystem. However, I have one question related to unaligned read transfers. Does AXI4 support unaligned read transfers although er are no strobe lines? If so, which data on...