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  • Booting of cortex M7 core, independently of cortex A53 core
    I have a development board of NXP that has 4 x A53 cores and 1 x M7 core. I want to run 2 different OSes on the boards that are independent of each other. And my goal is to boot the processors separately...
  • A53 core does not enter sleep state with WFE
    I am trying to use WFE on Linux user space. I have the following code, while(1) { if (condition==TRUE) break; __asm__ __volatile__ ("wfe" : : : "memory"); ... } It seems the core never...
  • Barriers in in-order cores like cortex-A53, A7
    Hi experts! As you know, power efficient arm like cortexA7, A53 has in-order pipleline. However as far as I understanding, Barriers like dmb, dsb, isb are related with out-of-order memory access. But...