• Bus error while executing ARMv8 TLB instruction
    Hi, I am facing "Bus error on memory operation" while executing below instruction while invalidating and flushing the TLB. I am not able to understand what is the reason for "Bus error" as it is a TLB...
  • Cryptography instructions sample for ARMv8
    hi, experts: I found ARMv8 supported some cryptography instructions. So: Is there any sample code demonstrating how to use these crypto instructions? best wishes,
  • Invalid state usage fault( INVSTATE ) for arm instruction
    Hi, We tried to execute a small assembly instruction function in .asm file for M7 core controller in GHS. But it initiated a hard fault exception with INVSTATE (Invalid state usage fault) bit is set...
  • No segmentation fault when expected with aligned load and store
    Hi all, It is a well known fact that performing an aligned vector load with an unaligned memory address should lead to segmentation fault. However, when I do try to run code segment below using the...
  • Synchronization of caches on ARMv8
    Hello, I have a question regarding the synchronization of caches on ARMv8 on Multi-Core. Let's assume that we have 2 cores that are running in parallel, and both has L1 Cache with line size = 64 Bytes...