• ARMv8: strongly ordered memory and exclusive access
    We are developing a bare metal secure OS on a NXP LS1043a board, with a Cortex A53 v8 core. While debugging some issue with DMA, I decided to switch all kernel mapping from Normal cacheable to Strongly...
  • Armv8 Memory Mapping
    I am looking to emulate an Apple II and would like to specify some address ranges as being memory mapped so that any access would result in perhaps an interrupt that I am then able to handle and in which...
  • ARMv8 EL1 MMU
    Hi,     I am working on bootloader porting to ARM v8 platform. I am facing a problem in enabling MMU in execution level-1 EL1. I am not able to set sctlr_el1.M bit when ever i try to set this bit the...
  • ARMv8-A CurrentEL Register Definition
    Where is the register definition of the CurrentEL register ?. I cannot seem to find it in the ARMv8A programming model guide or the Cortex-A53 TRM. . How does the PSTATE bits map to CurrentEL ? I...
  • indirect branches in ARMv8
    Please clarify that with me... With "The current Program Counter (PC) cannot be referred to by number as if part of the general register file and therefore cannot be used as the source or destination...