• [CM3]assembly language trouble
    CORE: STM32F103ZET6 Hi,Pros.      Here Monkey comes agian I have met a problem with my code,see below: /* --------- code here --------- */      .section .data _sp_usart:      .word     _stack_usart _stack_usart...
  • Measuring Cortex-M4 instruction clock cycle counts
    I'm trying to find a reliable method for measuring instruction clock cycles on the STM32F429 MCU that incorporates a Cortex-M4 processor. Part of the challenge is that although the core CPU has no cache...
  • Cortex M3 : what determines the cycle count for a variable cycle count instruction?
    I have looked at the cycle counts for the Cortex M3 instructions at http://infocenter.arm.com/help/topic/com.arm.doc.100165_0201_00_en/ric1414056333562.html . Some instructions are listed as taking a...
  • Loop unrolling on Cortex-M3 vs. Cortex-M0
    In the DSP lib files like arm_conv_f32, arm_fir_f32, the algorithm implementation in Cortex-M3/M4 and in Cortex-M0 is different. i.e., loop unrolling is used in M3/M4 and it is not used in M0. Pls tell...
  • Interruptible Instructions on Cortex-M4
    The ARM Cortex-M4 Processor Technical Reference Manual states: To minimize interrupt latency, the processor abandons any divide instruction to take any pending interrupt. On return from the interrupt...