• Exceptions levels in the ARMv8 architecture
    Hello There are four exceptions levels in the ARMv8 architecture. EL0 EL1 EL2 EL3 Can anyone explain more of the EL3 execption level? What does it mean by 'allows swtiching between secure and nonsecure...
  • Confusion about exception level of ARMv8
    Hi, I am fairly new to ARM processor and start work with cortexA57 recently.  After reading the technical manual and programmer guide , I have some questions regarding the exception level of v8. 1. How...
  • How to deice debug target exception level of watchpoint on ARMv8 architecture
    Hello, everyone I'm new to this community. I'd like to ask many questions and want to help someone. Now I have some difficulties in understanding aarch64's watchpoint exception handling scheme. I found...
  • ARMv8 exception vector significance of EL0_SP
    Hi,   I am new to ARMv8 architecture and while reading the v8 exception vectors I am not able to understand significance of adding SP_EL0 level vectors while SP_ELx vector set exists. What I am trying...
  • armv7a/armv8 : Undefined Abort Exception and MMU
    Hi ! When MMU is enabled, and a undefined abort exception is triggered, are we sure that the address stored in the `lr` / `elr_elx` registers is actually mapped by the MMU, or should I check that before...