• how can i design APB to AHB bridge ??
    i want to design a bridge between APB  and AHB in verilog my design consists of : 1. control clock unit (ccu)   // using APB 2. my DUT contains registers module & functional module  // using AHB 3. tow...
  • AMBA AHB
    Hi , In AHB specs, There is one note as below. Note Every slave must have a predetermined maximum number of wait states that it will insert before it backs off the bus, in order to allow the calculation...
  • Early Burst Termination with IDLE transfer in Multi-Layer AHB Lite
    Hi, We are designing an Asynch slave operating over Multi Layer AHB Lite 3.0. I have come across some case which I am not sure how it should be handled. I am getting a predefined burst INCR16 ,...
  • AHB transfer on Cortex-M3
    Hi, I am running following code in Cortex-M3. asm(" MOV R1,#0xFF0"); asm(" MOVT R1,#0xFFFF"); asm(" MOV R4,#0xAA0"); asm(" MOVT R4,#0xAAAA"); //start address asm(" MOV R3,#0x0000...
  • AHB HSIZE usage
    Hi, In AMBA ® 3 AHB-Lite Protocol , there is a description about the HSIZE signal: " The transfer size set by HSIZE must be less than or equal to the width of the data bus. For example, with a 32...