• Bootcode geneartion from C testcase for Cortex_R4
    Have existing setup for CortexM3 to generate bootcode from C tetscases. Able to use same setup  to generate bootcode for Cortex-M4 with minimum changes. But seeing issue while using same setup for Cortex...
  • ARMv7-R - Hidden Power
    In recent articles, I’ve overviewed the ARMv7 architecture and then looked in more detail at ARMv7-A ( ARMv7-A - Power to the People ) and ARMv6-M/ARMv7-M ( ARMv6-M vs ARMv7-M - Unpacking the Microcontrollers...
  • Non aligned access in arm v7 going into exception
    typedef struct __attribute__((__packed__)) { uint8_t    op_code; uint8_t    flags; uint32_t   logical_block_addr; uint8_t    group_num; uint16_t   tx_length; uint8_t    control; } SCSI_READ10_t; when...
  • COrtex M7 cache hit rate measurement
    Hello community, I have a Cortex M7 based product, and I want to measure the cache hit rate in different applications.compared to the cortex R5 the M7 does not embed a PMU. Do you have some idea on...
  • Compute the division via shift instruction
    I write the code as following to evaluate the expression n = n / 2 asrs r0, r0, #1 But, I found the GCC will translate the expression n = n / 2 into the following instruction lsrs r1, r0, #31...