• How does the ARM CA53 4 core join NEON on only 2 cores?
    Our project only wants 2 cores to support NEON for cost reasons. How can I do this? 1. Can a single cluster be done? 2. Cut into 2 clusters, each with 2 cores. What is the difference between the performance...
  • GIC order of completion of interrupts
    Hello, Reading the "ARM® Generic Interrupt Controller Architecture version 1.0 Architecture Specification" I read that "For nested interrupts, the order of interrupt completion must be the reverse of...
  • IRQ handler not called by ARM A53
    I'm testing GIC and ARM A53 connectivity. I can see that GIC is forwarding the IRQ request and ARM core has received it(shows in ISR reg). However, my IRQ handler is not getting called. Here is how I...
  • Which is better of thees CPUs
    Which is better of thees CPUs: Cortex A53 octa core 1.5 ghz, Cortex A7 Allwinner T8 Eight core 2.0 ghz, Cortex A9 Quad-Core 1.8 ghz ?
  • GIC-400 controller virtual interrupt handling in VM and hypervisor
    Hi, I am new to ARM architecture and as of now exploring GIC Controller GIC-400 and using ARM Cortex a57. Sorry for asking very fundamental flow of interrupts handling GIC-Virtual extension Let assume...