• Enabling MMU in EL-2
    Hello, I'm developing a Baremetal application running on ARM Cortex A35 (ARMv8). I have succeeded to enable the Caches and MMU in EL-1. My questions are: 1. Can I enable the MMU and invalidate...
  • aarch64 MMU: inconsistency in ARMv8 ARM?
    Hello, I try to reconfigure the MMU of an existing project. I try to do this by building upon an example of ARMv8 ARM. The example is the one in section K7.1.2, fig. K7-11, page 7293. I find the information...
  • Juno MMU setup
    Hi, I was trying to change my MMU setup from 39bit address space to 40bit address space in Juno. Previously I was successfully able to map 39bit address space by setting T0SZ=25 and using L1 level...
  • How to temporarily disable MMU in EL3?
    I am using Trusted Firmware provided by Linaro on Juno Board R1. Now I want to disable MMU in EL3 and do some custom jobs, and then enable MMU again. As I don't want to disturb other codes in EL3, I guess...
  • aarch64 MMU: skipping first/second level tables
    Hi ! on armv7 [1] / aarch32 [2] MMU, when using Long descriptor, when the virtual space described by ttbr0 is small enough (1Gb here), the level 1 translation can be skipped, leaving only two levels...