• How to use ETM to trace PMU events?
    According to the manual, we can select PMU events as external input resource of ETM. However, the manual does not describe it in detail, and my attempts also failed. To perform the experiment, i configure...
  • Is there any ETMs supporting data trace in the market?
    The manual of ETM tells that the ETM supports data trace. However, we checked the manual of Juno board and most recent Cortex A75 processors, and found that the data trace is not implemented. Currently...
  • Can I make ETM and PMU secure access only?
    ARMv8 manual says that we can make system register access to trace registers and PMU registers trap to EL3. However, ETM and PMU in Juno can be accessed through memory-mapping interface. Is there anyway...
  • Can we get notified when the ETB is full?
    Hi everyone, I am using ETM v3.3 and ETB11 on Cortex-A8 to trace the execution of the applications. As the size of the ETB is normally very limited on the development boards, it always overflow in less...
  • How to understand AArch64 register 'Operation' column for 'Direct access to internal memory' in Cortex -A53?
    I'm reading "ARM® Cortex®-A53 MPCore Processor Technical Reference Manual". And, in 6.7 Direct access to internal memory part (P.357), there is a problem to understand what is the meaning of AArch64...