• Juno r2 L2 and TLB cache
    Hey guys, I need your help because I have to count the number of L2 instruction access, miss and hits. But in the data-sheet I did not find the events that I have to count. I found it in the ARM V8...
  • How to select MMU-401 TLB description format?
    Hi experts, MMU-401 TLB support for the following: — ARMv7 4KB, 2MB, and 1GB page sizes. — ARMv8 64KB and 512MB page sizes. In TRM, there is a register bit about PAGESIZE, 0:4KB, 1:64KB. So, I think user...
  • Occurrence of a Data Abort exception in bare board application executing on i.MX6 based board
    We have developed a bare board software on NXP’s i.MX6 based platform. The bare board software enables MMU after initializing a single ARM Cortex-A9 processor to execute a small application. Initial...