• L2 cache misses in Samsung Exynos 4 Quad using Streamline
    Is it possible to measure PL310 events using the DS-5 Streamline? The target device is Samsung Galaxy S3 with Exynos 4 Quad SoC and Cortex A9 cores. The device runs Android. -Dhinakaran
  • Why Cache L1 Counters disable on Streamline
    Hello every one, ARM DS-5 (University) streamline to read counter events from Beagle Bone Black board. for some reason i can not get the l1Caches counter to work. Any Advice? Thanks
  • DS-5 Community Edition - Streamline limitations
    Hello, I'm considering to use DS-5 for profiling my application. Which are the main limitations of Streamline in the Community Edition? Which counters are available? Can be counters associated to specific...
  • TrustZone with PL310
    Note: This was originally posted on 17th August 2013 at http://forums.arm.com I plan to use a simple 'TrustZone Monitor'  with PL310(L2CC). In non-secure, I will play a Linux-Kernel. One problem. 1. PL310...
  • Exynos 5 (startup code.)
    Dear all, I am interested in a code snipped that will startup the Cortex-A15 processor (interrupt vectors, MMU cache, etc.. ) and then give control to the main function of a bare-metal application. I...