• bug report: CMSIS Driver I2C STM32, I2C_CR1_POS
    Hello, Driver: CMSIS I2C STM32F4xx, Rev 2.3 The Driver produces an error after a 2-byte Master Receive Operation. After a 2-byte master Receive Operation I2C_CR1_POS bit remains set. A following...
  • [BUG] CMSIS I2C Driver for STM32F4xx (v2.9)
    Hello, Memory overflow occurs when receiving 2 bytes using the driver. Works fine for 1 byte. Here is a code to simulate the problem: ARM_DRIVER_I2C *I2Cdrv = &Driver_I2C1; uint8_t buf[2];...
  • bug in CMSIS USART driver
    hello, obviously there is a small bug in CMSIS USART Driver STM32F4xx Rev 2.3: line 1808: else if (usart->reg == USART3) { __HAL_RCC_USART2_CLK_ENABLE(); } correction: else if (usart->reg...
  • I2C address format in CMSIS Driver
    Hi all, I am trying to use the I2C interface of the new CMSIS Driver to communicate with a fm24cl64b eeprom memory. From the datasheet I read is possible to define with two bytes the address to read...
  • BUG: CMSIS USART Driver STM32
    Hello, I've found a bug in the CMSIS USART_Driver of the Device Family Pack STM32F4xx, Version 2.4.0. Previous Version are concerned, too. When frequently polling USART_GetStatus while receiving...