• remapping of ddr
    Hi again I am still struggling with debugging my code in DDR3 memory using the Keil uLink2. I have created a .ini file for the uLink2 to execute which initializes the DDR3 for use, load my code to...
  • DS5 streamline DDR DMA Access
    Hi I am using DS5 streamline to analyse DDR access in a Cortex-A7 based SOC(Telechips). I assume streamline is showing the memory access by CPU. Is there any way to analyze DDR access by DMA in...
  • Cortex-M3, initializing heap in DDR before its initialized
    Hi I have been trying to solve problem with a Cortex-M3 in how to configure the scatter file to place my heap/stack in DDR memory. I am writing a bootloader program which will run out of NVM but after...
  • complier, failure, code , debugging
    The code is written well, but when I press build and enters the debug window, it misses some lines. I thought it might be the intending problem, but is the problem the Keil software. In debugger window...
  • Debugging RTX code
    Hi, I'm trying to debug a sample RTX code running on MCBTMS570 board using uVision 4 and Segger J-Link jtag pod. The code compiles fine an runs if I start from a reset. (LEDs are blinking as they...