• Local and global monitor for exclusive access
    Note: This was originally posted on 19th August 2011 at http://forums.arm.com Hi, My questions are about monitor for exclusive access. 1. If I want to use exclusive access in a dual Cortex cpu system...
  • AXI 3/AXI 4 Exclusive Access
    Note: This was originally posted on 14th June 2011 at http://forums.arm.com Hi, I have a query  regarding Exclusive Access in AXI 3/ AXI 4. The spec does NOT say anything about this behavior, hence I...
  • LL/SC exclusive access by register width or cache line width?
    Note: This was originally posted on 30th May 2012 at http://forums.arm.com Hi. I'm working on the next release of my lock-free data structure library. I'm using LL/SC on ARM. To use LL/SC as LL/SC (rather...
  • mutual exclusion between ISR and a RTX Thread
    I need to share a data structure used by a RTX Thread and and ISR. Its basically a circular queue for the serial port. Now the options that I am aware of are to either use isr_mbx_send() to post messages...
  • Accessing
    Cross-posting from http://www.8052.com/forum/read.phtml?id=27259&top=27260 A while back, Jon Ward wrote: "You COULD do this [access a 'C' array in an I2C device] with the Keil tools specifying...