• Problem with partial word access to Altera Cyclone V FPGA
    when I say partial word access, I mean 16-bit (two byte) or 8-bit (byte) read/write. Background: In one of our recent projects, Cyclone V SoC is used to replace 386 CPU in an existing product. I am responsible...
  • Cyclone TCP Spi problem
    I want use enc28j60+stm32. I enable it and compile done. how can config my spi to cycloneTcp?
  • DS-5 Debugging on a Samsung S III
    Note: This was originally posted on 22nd May 2013 at http://forums.arm.com Hi there, Assume I know nothing which isn't so far from the truth.  I've been trying to use DS-5 to debug native C++ code on...
  • Somebody programmed ARM for Cyclone V SoC?
    Hello. I study ARM in Altera Cyclone V SoC. I use Eclipse for DS-5. But I don't to start example.  Somebody programmed ARM for Cyclone V SoC in Eclipse DS-5?
  • Keil uVision4 Debugger or Hardware Problems
    Hi, I use Infineon XE164F-96F66 build und flash the target is no problem, but the Debugger stops a the following line: Load "D:\\...\\Source\\XE164" WS 1, 'T1 PA \\XE164\ADC0\ADC0_viSRN0 *** error...