• bug report: CMSIS Driver I2C STM32, I2C_CR1_POS
    Hello, Driver: CMSIS I2C STM32F4xx, Rev 2.3 The Driver produces an error after a 2-byte Master Receive Operation. After a 2-byte master Receive Operation I2C_CR1_POS bit remains set. A following...
  • [BUG] CMSIS Driver I2C, I2C_CR1_POS flag
    Driver doesn't clear I2C_CR1_POS after 2-byte reception in DMA mode. There is no problem when DMA is not used. I've created a new thread because the old one became read only: http://www.keil...
  • Advice on implementing CMSIS I2C Driver for stm32
    Hello, I am considering implementing I2C Driver for an stm32 device using the interface defined by cmsis. One thing that has my attention however, is it seems a little constraining. I have worked with...
  • [BUG] CMSIS I2C Driver for STM32F4xx (v2.9)
    Hello, Memory overflow occurs when receiving 2 bytes using the driver. Works fine for 1 byte. Here is a code to simulate the problem: ARM_DRIVER_I2C *I2Cdrv = &Driver_I2C1; uint8_t buf[2];...
  • CMSIS specification version format issues
    Hi, We are following the CMSIS standard to create our Pack files. We have come to update our CMSIS code base, and noticed some of the CMSIS standard changes for Versions in packs and within packs...