• RTX - FIFO overflow after isr_evt_set call.
    I am trying to create an RTX project to run on the A2F-EVAL-KIT. I have three tasks running, two of them have a priority of 1 and use os_evt_set and os_evt_wait_or to take turns executing. This runs...
  • fifo()
    Hi All,, The Data is serially coming into my controller , is processed there and then sent out serially. The data is packed between header (8 zero bytes) and tailer (8 0xff bytes). Should i detect...
  • UART FIFO
    Hi, i got a problem with the UARTn FIFO . Can someone explain me how i get the data from this register? The manual says that, if i enable the Rx trigger level for example level3 (8 character) the...
  • UART TX FIFO
    Hello, Using an LPC2400 family with UART FIFOs enabled (RX & RX) does this mean that in entire TX FIFO (16 bytes) must be filled in order to have data placed on the bus, or does that happen every predefined...
  • code for tx fifo of lpc2148
    hii...im working on gsm sim908 wid lpc 2148...how to read a response of gsm from lpc uart0 which is greater than 16 bytes?? cud sumone post me a code for dat and shud d response to b stored in an array...