• CMSIS RTOS priority levels
    I've been looking through some details about porting code from Keil's RTX (RL-ARM) to CMSIS_RTOS RTX. In particular Appnote #264 looks appropriate to that. I see that whereas the RL-ARM RTX allows...
  • External Interrupt Priority Level Register Cortex M3
    Note: This was originally posted on 15th July 2010 at http://forums.arm.com Hi, I am trying to program the priority level of external interrupts but without any luck snippet from the code -----------...
  • Interrupt Priority with Cast R8051
    Hello; I'm using uVision to simulation a Cast R8051. I've noticed that setting the IP SFR (0xB8) does not change the interrupt priorities, but instead enables INT0A, INT1A, and INT2-7. The Cast documentation...
  • Interrupt priority query
    I am currently using timer2 count a number of preset timeouts on an AC waveform for an AC regulator. I have given timer2 the highest interrupt priority, but have found that occasionally timer1 (used...
  • monitor - interrupt priority
    Does the monitor of the Keil debugging tools change the interrupt priority of the user program? Does anybody know? Best regards Karlheinz