• The difference between DSB and DMB instructions of ARM1176JZF-S
    Note: This was originally posted on 30th September 2011 at http://forums.arm.com Dear Sirs,         I am currently testing a comstomized SOC with ARM1176JZF-S core, 32KB-cache on Linux-2.6.31.2, and I...
  • mismatching instruction cycles between the simulator and manual
    Hi, While evaluating the efficiency of Cortex-M4, I found that simulator's cycle counts for several instructions are inconsistent with the manual. For example, the simulator counts 3 cycles for...
  • Can wfe/sev instruction work between 64 & 32 bit cores?
    Hi Expert, In a multicore system, core1(64bit mode) is pending by wfe instruction. If core0(this is also a 64bit core but it switched from 64 to 32bit mode) run sev instruction, can core1 be waked up...
  • assembly instruction
    Hi, i want to put some assembly instruction in my c program, using .asm and .endasm but it seem doesn't work. Can anybody help, i'd appreciate your respond. sincerly, hardian hardian_97@yahoo...
  • bad instruction
    Hi, I am having a while(1){} loop and all interrupt disabled. It loops for a while and then gets out of the loop, jumping to a random address (not interrupt vectors) or break of out the loop and continues...