• What is best practice for ARM compiler 6.7
    I've been playing around with the ARM C compiler 6.6 and 6.7 for cortex m3 and I was wondering what is the best practice for the enabling of compiler warnings? What level of warnings should be a minimum...
  • ?CCASE bugs in optimize(9,size)
    Version 5.1 C51.exe generates code that randomly resets when compiled optimized level 9, favor size, unless all switch statements are replaced with if-then. This is on years-old stable code that recently...
  • Optimizing code size
    Hi, I am developing an application for ARM lpc2102.The code size is very critical so I decided to look for list file generated by Keil: var | = EXPAND LDR R0=var LDRB R1,[R0,#0x0] MOV R0,#0x1 ORR...
  • Compiler Optimization Bug - Intermittent USB Failure
    This issue relates to uVision 4.0 compiling for the ARM9, however it is probably relevant for other devices as well. We had a problem with our device locking up intermittently inside the while(1) loop...
  • ARM Compiler optimization effects
    Hello, I'm using Keil uVision V5.24.2.0 with ARM Compiler V5.06 update 5 (build 528). Initially, compiler optimization level was set to 1. With this level, I found that the address assigned...