• Need help in understanding NVIC
    Hi, While using statement like; NVIC_SetPriority(I2C_IRQn,Set_priority); What is max & min value for Set_priority. Can two interrupts have same priority. Also when I am in some ISR, how...
  • STM32F107 - NVIC - Priority
    Using a STM32F107VC (on the MCBSTM32C) I am able to setup and run an interupt driven peripheral. However, I am unable to set the priority of that interrupt using the 'Standard Peripheral' functions...
  • HardFault_Handler after NVIC access.
    Used hardware: KEIL ARM MCB1700, eval How can the line: NVIC_EnableIRQ(UART0_IRQn); create an error HardFault 715: NVIC_EnableIRQ(UART0_IRQn); 0x000024B0 2005 MOVS r0,#0x05 0x000024B2 F000F9AF...
  • STM32 (ARM Cortex-M3) NVIC
    Does anyone have any information or resources regarding the NVIC (Nested Vectored Interrupt Controller) in the STM32? I've gone through the Keil USART IRQ example, but it simply configures it on one...
  • ARMv7M:  NVIC Default Access Permission
    Note: This was originally posted on 11th June 2011 at http://forums.arm.com Hi, I read on a manual that NVIC access is blocked by default.  Does this mean when MPU is disabled or not present, I cannot...