• Cache disabling
    Note: This was originally posted on 1st September 2010 at http://forums.arm.com As I walked through the code of different boot loaders (say uboot) , I found that they flush and disable cache in startup...
  • CACHED keyword
    hi, reading the documentation of cached vectors ( http://www.keil.com/support/man/docs/c166/c166_le_intcached.htm ) i discovered the keyword CACHED which is not listed in the list of keil keywords (...
  • How to enable I-cache and D-cache on LPC313x ?
    Hi, I wish to improve performances of my application by enabling I and D cache in my LPC3131 chip. I don't use any external memories and no OS. One says me : "The default MMU tables in BootROM...
  • Image load failure
    Hello, I have this scatter file LR_IROM1 APPLICATION_START_ADDRESS APPLICATION_IMAGE_MAX_SIZE { ; load region size_region ER_IROM1 APPLICATION_START_ADDRESS RESET_VECTOR_AND_KERNEL_SIZE { ;...
  • Load image file (WINARM)
    Note: This was originally posted on 14th August 2009 at http://forums.arm.com [color="#FF0000"]The legacy armsd and AXD debuggers do not support the new DWARF3 debug information produced by RVCT 3.0....