• Answered

    Cortex-M1 for Xilinx FPGAs, max. clock frequency? +1

    • Cortex-M1
    • FPGA
    • AXI
    • DesignStart
    • Cortex-M
    5705 views
    3 replies
    Latest over 4 years ago
     by NUELLE
  • Answered

    How to use the microphone to input sound and store on the MPS3 FPGA +1

    • FPGA
    • Cortex-M3
    • DesignStart
    • Cortex-M
    • Cortex-M33
    • MPS3 Prototype
    5711 views
    5 replies
    Latest over 4 years ago
     by Joseph Yiu
  • Answered

    ERROR: [IP_Flow 19-3461] Value 'reset' is out of the range for parameter 'RESET BOARD INTERFACE(RESET_BOARD_INTERFACE)' for BD cell 0

    6387 views
    3 replies
    Latest over 3 years ago
     by jpthibault
  • Answered

    Can SoC Verification be automated using Machine Learning? If so, how can we ensure 100% functional coverage? 0

    • Cortex-M0
    • Custom SoC
    • AXI
    • CHI
    • Cortex-M3
    • Verification
    • DesignStart
    • Cortex-M
    • SoC Verification
    4904 views
    1 reply
    Latest over 5 years ago
     by Alexis Ogborn
  • Answered

    Test Errors with DesignEval Kit (arm_cortex_m3_designstart_eval_rtl) +1

    • FPGA
    • ACE
    • Compiling
    • DesignStart
    • MPI
    • Cortex-M
    • Library
    • Design Kits
    • Interface
    • Cortex-M Prototyping System (V2M-MPS2)
    • Linux
    5287 views
    3 replies
    Latest over 5 years ago
     by Sean Houlihane
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