in mobile studio Streamline data，I found that $MaliRayTracingIntersectionsOpaqueTriangleHits and $MaliRayTracingIntersectionsRayMisses represent the number of hits and misses that the triangle intersects with the ray.
and $MaliRayTracingTriangleBatch…
Hello everyone!
I'm wondering if any Arm Mali GPUs, except for Mali-G78AE, are connected to a SMMU.
I have checked that Mali-G610 isn't connected to SMMU (at least in sysfs & device tree).
It's common to have peripherals isolated via SMMU or…
Hello Folks,
I have a question about not being able to change the GIC memory map in the baremetal development environment.
■ Questions
I am implementing interrupt processing in a bare metal development environment. If the GIC is placed in the default memory…
We have platform based on N1 NeoVerse CPU, I see in Buildrood there is a dependency on GCC-9 and Higher compiler version. We are using ARM Linaro toolchain GCC Version 6.4.1 for compiling linux kernel. Is there a hard limitation or requirement that only…
Hi
My name is Stephen and I work at Arm.
Just to check: did you download Arm DS 2020.0, or the latest 2023.0 ?
30-day evaluation licenses can only be used with the latest Arm DS 2023.0 product.
If you downloaded 2020.0, then please uninstall it, then download…
Hello Jent,
VTOR (TBLOFF field) extends to full 32-bit range:
https://developer.arm.com/documentation/ddi0403/d/System-Level-Architecture/System-Address-Map/System-Control-Space--SCS-/Vector-Table-Offset-Register--VTOR
LLVM 16 was announced on March 17, 2022. As usual, Arm added support for new architectures and CPUs, and significant performance improvements. This time around, we also brought exciting new functionality such as function multi-versioning and full support…
Hi Arm,
when I can access all registers in SoC through ads/cast, i want to initial a ddr controller or trainning ddr,
this process requires interaction and return value acquisition and judgment and finally output autolly,
no need manually input in processing…
Sharing some experiments:
do {
u32 irqstat = gic_read_iar();
u32 irqnr = gic_iar_irqnr(irqstat);
if (irqnr != GICC_INT_SPURIOUS) {
... delay ...
gic_write_eoir(irqstat);
} else {
break;
}
} while (1);Hi,
I am trying to compile opencv for Cortex-r5 MCU's. I have used the "gcc-arm-none-eabi-10.3-2021.10" version and I was able to get most of the things compiled correctly without any issues. However in one of the files the opencv used
…