• Not Answered

    Why AXI4 changed the definition of AxCACHE? 0

    • AMBA
    • AXI
    • AXI4
    • Interface
    15545 views
    1 reply
    Latest over 4 years ago
     by Colin Campbell
  • Not Answered

    Conflict, Register offset of GPIOx_BSRR of STM32F0x1/STM32F0x2/STM32F0x8 0

    • STM32F
    13971 views
    1 reply
    Latest over 4 years ago
     by Petr Weissar
  • Suggested Answer

    Problems about signal dependencies in AXI spec 0

    • AMBA
    • AXI5
    • AXI
    • AXI4
    • Interface
    14922 views
    2 replies
    Latest over 4 years ago
     by Yu-Hsin
  • Not Answered

    How to map tag RAM banks to data cache lines in Cortex-R5? 0

    • AMBA
    • Cortex-R
    • AXI
    • Cortex-R5
    • Coetex-R5F
    • Interface
    12329 views
    0 replies
    Started over 4 years ago
     by Etienne Alepins
  • Suggested Answer

    arm toolchain: any requirement for kernel headers ? 0

    • Arm Compiler
    • GCC
    • Arm Compiler 5
    13778 views
    1 reply
    Latest over 4 years ago
     by Jason Andrews
  • Answered

    Are CMSIS drivers for Flash portable on all Cortex M0(vendor independent)? 0

    • Cortex-M0
    • Cortex-M
    • CMSIS
    14789 views
    1 reply
    Latest over 4 years ago
     by Christopher Seidl
  • Not Answered

    confusing about procedure of ISR in book "ARM system developer guide" 0

    • Software Development
    14776 views
    2 replies
    Latest over 4 years ago
     by AndyLinNewbie
  • Not Answered

    ARM Cortex-M4 (Nuvoton NUC472) not booting with External RAM on EBI Interface 0

    • Cortex-M
    • CMSIS
    • Cortex-M4
    13340 views
    0 replies
    Started over 4 years ago
     by Ritesh Prajapati
  • Not Answered

    Cortex M7 DSP moving average UMAAL 0

    • Cortex-M7
    • Armv7-M
    • Cortex-M
    14355 views
    2 replies
    Latest over 4 years ago
     by Simon Craske
  • Not Answered

    IpWay/HOST free Tcp/Ip Stack Library for ARM core 0

    • 32-bit
    • STM32Fm
    12842 views
    0 replies
    Started over 4 years ago
     by Giovanni Di Martino
  • Not Answered

    Lock up state in ARM Cortex M4F 0

    • cortex-m4f
    • Cortex-M
    12099 views
    0 replies
    Started over 4 years ago
     by bewoke2
  • Not Answered

    IoT boards which are compatible with wireless vibration sensors 0

    • internet of things
    12939 views
    2 replies
    Latest over 4 years ago
     by Jame William
  • Answered

    AXI protocol - Unaligned data transfer definition +1

    • AMBA
    • AXI
    22443 views
    2 replies
    Latest over 4 years ago
     by hayk
  • Not Answered

    Any experiences about BLE security with Arduino? 0

    • Security
    • ble
    14430 views
    1 reply
    Latest over 4 years ago
     by Mathew
  • Not Answered

    FFT algorithm 0

    • fft
    • Cortex-M3
    • Cortex-M
    • STM32F
    15545 views
    2 replies
    Latest over 4 years ago
     by FKlein
  • Not Answered

    ARM Zynq Cortex-A53: implementing complex matrix inversion 0

    • fft
    • Cortex-A53
    • Armv7
    • Armv8
    • NEON
    • Cortex-A
    16696 views
    5 replies
    Latest over 4 years ago
     by Chris Armstrong
  • Not Answered

    Burst Length of wrap type in AXI4 0

    • AMBA
    • AX14
    13273 views
    2 replies
    Latest over 4 years ago
     by Colin Campbell
  • Not Answered

    Cortex M series and their compatibility 0

    • Cortex-M0
    • Cortex-M
    12744 views
    1 reply
    Latest over 4 years ago
     by 42Bastian Schick
  • Not Answered

    Is Overwriting Ex-READ allowed when Ex-Write Response is pending? 0

    • AMBA 4
    • AX14
    12705 views
    3 replies
    Latest over 4 years ago
     by Vanhealsing
  • Not Answered

    Other core's view after writing ICC_SGI1R_EL1 to trigger SGI 0

    • CoreLink System Controllers
    • Interrupt
    14133 views
    5 replies
    Latest over 4 years ago
     by 42Bastian Schick
<>