• Discussion

    SAU vs. IDAU in a System with Multiple Masters

    • Security
    • TrustZone
    • Armv8-M
    10819 views
    5 replies
    Latest 1 month ago
    by Chris Reed
  • Not Answered

    Does it use a Slow Clock to turn off Main Clock? 0

    258 views
    0 replies
    Started 1 month ago
    by Ridge Mao
  • Not Answered

    Debug single step and interrupts not executing 0

    • Interrupt Handling
    • 14 (PendSV)
    • Debugging
    • Cortex-M4
    173 views
    0 replies
    Started 1 month ago
    by KjO
  • Answered

    Can re-order depth affect functionality of write transaction? 0

    984 views
    5 replies
    Latest 1 month ago
    by Colin Campbell
  • Suggested Answer

    Where can I find "ARMv8 Instruction Set Overview" (PRD03-GENC-010197) 0

    • AArch64
    • Armv8-A
    1529 views
    7 replies
    Latest 1 month ago
    by Senna van Hoek
  • Not Answered

    Alignment Address Calculation in AHB +1

    • AMBA
    • AHB
    • Interface
    11933 views
    5 replies
    Latest 1 month ago
    by Colin Campbell
  • Not Answered

    HTRANS when HREADY is low on the 2nd HCLK after starting the transfer 0

    • AMBA 3 AHB Interface
    • AHB
    498 views
    1 reply
    Latest 1 month ago
    by Colin Campbell
  • Suggested Answer

    Arm Musca A1 - SRAM0 MPC Security attribute during boot 0

    • Musca-A
    • TrustZone for Armv8-M
    • CoreLink SSE-200
    2599 views
    2 replies
    Latest 1 month ago
    by Daniel Oliveira
  • Answered

    Puzzled by conflict in spec regarding memory types for AxCACHE bits +1

    637 views
    1 reply
    Latest 1 month ago
    by Linda C.
  • Answered

    Programing Atmega328p paired with SIM900 +1

    2004 views
    8 replies
    Latest 1 month ago
    by Balvinder
  • Answered

    MRAM Data Losing Problem 0

    1024 views
    5 replies
    Latest 1 month ago
    by Andy Neil
  • Answered

    Simulate Cortex-M0 FPGA implementation in ModelSim +1

    • Verilog
    • Cortex-M0
    • FPGA
    • CHI
    • Compiling
    • DesignStart
    • MPI
    • Cortex-M
    • Windows
    • Linux
    2560 views
    2 replies
    Latest 1 month ago
    by JamesBr
  • Answered

    8051 cannot get serial port 1 to work +1

    • Keil C51 Dev Tools
    • C
    2920 views
    3 replies
    Latest 1 month ago
    by Birmingham
  • Not Answered

    Cortex-M3 r2p1 TRM Document CPUID.PARTNO is wrong? 0

    393 views
    1 reply
    Latest 2 months ago
    by 42Bastian Schick
  • Answered

    exporting sensor data from STM32 to a file on pc or board memory +1

    • STM32 L4
    • Internet of Things (IoT)
    • Sensors
    995 views
    1 reply
    Latest 2 months ago
    by Andy Neil
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