• Answered

    Is Advanced-SIMD supported in Cortex-R5F? 0

    • Cortex-R
    • Cortex-R5
    • Armv7-R
    • SIMD and Vector Execution
    5517 views
    5 replies
    Latest 11 days ago
    by Zenon Xiu
  • Answered

    New member 0

    946 views
    11 replies
    Latest 1 month ago
    by Andy Neil
  • Answered

    setting breakpoint from code +2

    • Cortex-M3
    • Cortex-M
    5481 views
    10 replies
    Latest 5 months ago
    by Joseph Yiu
  • Answered

    Cortex-M unintentional Flash Read-While-Write 0

    • Cortex-M7
    • Memory Protection Unit (MPU)
    • Cortex-M
    5047 views
    7 replies
    Latest 7 months ago
    by Casey Davis
  • Answered

    Forced Hardfault (INVPC) Exception Error +2

    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    6105 views
    5 replies
    Latest 9 months ago
    by Joseph Yiu
  • Answered

    Cortex-M RTOS related exceptions and concepts +2

    • Armv7-M
    • Cortex-M
    4871 views
    2 replies
    Latest 10 months ago
    by Sigma
  • Answered

    Can a student simulate the free Cortex-M from DesignStart? +1

    • Verilog
    • Cortex-M0
    • CHI
    • Simulation
    • DesignStart
    • Cortex-M System Design Kit
    • Cortex-M
    • Variable
    • System Design
    • Windows
    • Linux
    4365 views
    3 replies
    Latest 10 months ago
    by Sara01
  • Not Answered

    What is the behavior for a "BKPT" instruction in a HardFault handler 0

    6176 views
    5 replies
    Latest 10 months ago
    by Gutierrez
  • Answered

    Xilinx FPGA Block ROM is used as FLASH and how to load the program in to this? 0

    • Cortex-M0
    • FPGA
    • JTAG
    • Keil
    • DesignStart
    • ULink2
    • Cortex-M
    • SWD
    • Block
    • Memory
    4776 views
    4 replies
    Latest 11 months ago
    by Joseph Yiu
  • Answered

    why does LDR takes two cycle to be executed 0

    • Cortex-M0
    • Cortex-M
    5085 views
    7 replies
    Latest 11 months ago
    by Joseph Yiu
  • Answered

    how to handle lockup state in M33 +1

    7720 views
    14 replies
    Latest over 1 year ago
    by d.ry
  • Answered

    Debugging a Cortex-M0 Hard Fault 0

    • Armv6
    • Cortex-M0
    • Armv6-M
    • Armv7-M
    • Cortex-M3
    • Cortex-M
    • Debugging
    61663 views
    6 replies
    Latest over 1 year ago
    by delinaty
  • Answered

    Cortex-M7: Force Precise Exception on Bus Fault +1

    22431 views
    4 replies
    Latest over 1 year ago
    by Daniel Oliveira
  • Not Answered

    Cortex-M3 frequency 0

    2942 views
    2 replies
    Latest over 1 year ago
    by Joseph Yiu
  • Answered

    Fail to connect with CM0DSEvel 0

    • Cortex-M0
    • DesignStart
    3758 views
    5 replies
    Latest over 1 year ago
    by RickyChen
>