• Answered

    [CM3]which clock sources can be closed? 0

    • Cortex-M3
    • Cortex-M
    5287 views
    5 replies
    Latest over 5 years ago
    by meetha@goa.bits-pilani.ac.in
  • Not Answered

    Cortex-M7 "zero overhead loop" 0

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    6280 views
    6 replies
    Latest over 5 years ago
    by Hanni Lozano
  • Answered

    Return address from FIQ_Handler. Do we come back to the next instruction? 0

    • Armv7-A
    • Armv7-R
    • Cortex-M
    2478 views
    3 replies
    Latest over 5 years ago
    by Harshdeep
  • Answered

    how to continue after breakpoint +1

    5197 views
    8 replies
    Latest over 5 years ago
    by Jens Bauer
  • Answered

    How many times same interrupt can be in pending state at a time? (In ARM CM-3) 0

    • Cortex-M3
    • Cortex-M
    2496 views
    2 replies
    Latest over 5 years ago
    by Jens Bauer
  • Answered

    Problems with interrupting LDM/STM Cortex M4? +1

    • Armv7-M
    • Cortex-M
    • Cortex-M4
    16572 views
    18 replies
    Latest over 5 years ago
    by mi Zoli
  • Answered

    ARM Cortex-M0 Details +1

    • Cortex-M0
    • Cortex-M
    11209 views
    7 replies
    Latest over 5 years ago
    by Indira
  • Answered

    ASR #32 0

    • Cortex-A
    • Cortex-A7
    5870 views
    10 replies
    Latest over 5 years ago
    by Jens Bauer
  • Answered

    Cortex-R doesn't have MMU, is this has some advantages? +1

    • Processor
    • Cortex-A
    2518 views
    2 replies
    Latest over 5 years ago
    by Jens Bauer
  • Answered

    ARM instruction set pseudo instructions 0

    • Armv7-A
    • Cortex-A
    • Cortex-A7
    5200 views
    7 replies
    Latest over 5 years ago
    by Juha Aaltonen
  • Answered

    Instruction timings - arm cortex m3 0

    • Cortex-M3
    • Cortex-M
    23897 views
    16 replies
    Latest over 5 years ago
    by Jens Bauer
  • Answered

    PixMap Surface slower and slower, why? 0

    • OpenGL ES
    • Mali-GPU
    • Mali-400
    2978 views
    5 replies
    Latest over 5 years ago
    by Акоб
  • Answered

    Cortex-A5 based processors +1

    • Cortex-A9
    • Cortex-A5
    • Cortex-A
    • Cortex-A8
    5255 views
    3 replies
    Latest over 5 years ago
    by Axel Heider
  • Answered

    Compute the division via shift instruction +1

    • Cortex-M0
    • Cortex-M
    2444 views
    4 replies
    Latest over 5 years ago
    by Jerome Decamps - 杜尚杰
  • Answered

    I cannot write the sp register in the monitor mode +1

    • Armv7-A
    • Cortex-A
    • Cortex-A7
    17499 views
    21 replies
    Latest over 5 years ago
    by Juha Aaltonen
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