• Answered

    Burst termination with BUSY on AHB Lite 0

    • AHB-Lite
    4666 views
    2 replies
    Latest over 2 years ago
    by Lumi Yang
  • Not Answered

    AMBA AHB5 to AHB lite 0

    • AMBA
    • AHB-Lite
    • AHB5
    • AMBA AHB Controllers
    12338 views
    4 replies
    Latest over 2 years ago
    by Hsuan
  • Not Answered

    AXI read response in error case 0

    • AMBA
    • AXI
    • Interface
    23128 views
    2 replies
    Latest over 2 years ago
    by Jin Ji
  • Answered

    NIC-400 Clock Relations questions in Socrates 0

    3273 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Answered

    How should a AXI MASTER or SLAVE behave when a xREADY signal is never asserted? 0

    • AXI
    16641 views
    5 replies
    Latest over 2 years ago
    by Eric KIM
  • Not Answered

    Fixed burst and AxLEN relationship 0

    18951 views
    3 replies
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    APB - Purpose of PADDR? 0

    • APB
    • APB Peripherals
    • AMBA 3 APB Interface
    • AMBA 2 APB Interface
    3566 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Answered

    Can re-order depth affect functionality of write transaction? 0

    4449 views
    5 replies
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    Alignment Address Calculation in AHB +1

    • AMBA
    • AHB
    • Interface
    18756 views
    5 replies
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    HTRANS when HREADY is low on the 2nd HCLK after starting the transfer 0

    • AMBA 3 AHB Interface
    • AHB
    3264 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    AXI4 VIP unable to change values of control signal 0

    • AMBA 4
    • AXI
    • AXI4
    4556 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    AHB two-cycle Response +1

    5212 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    In APB, for data bus width, can I increase from 32 bits(default) to 64 bits(as per my project requirements)? 0

    • APB
    • AMBA 2 APB Interface
    7893 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    what is "transfer" signal mentioned in the APB state diagram? Can I use "PSELx" signal to determine transfer is going to happen? 0

    • APB
    • AMBA 2 APB Interface
    6668 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Answered

    axi ordering +1

    8956 views
    6 replies
    Latest over 2 years ago
    by Drive45
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