• Answered

    ARM v8 A64 instruction 32-bit variant usage 0

    • 32-bit
    • 64-bit
    3684 views
    2 replies
    Latest over 7 years ago
    by cray
  • Answered

    ARM Cortex A9 second execution unit 0

    • Cortex-A9
    • Cortex-A
    7848 views
    6 replies
    Latest over 7 years ago
    by Chris Shore
  • Answered

    Cortex-M3: Are "Errata Notice" and "Software developers Errata Notice" the same? 0

    • Cortex-M3
    • Cortex-M
    3136 views
    2 replies
    Latest over 7 years ago
    by J K
  • Not Answered

    Guidelines on Energy effecient code 0

    7887 views
    11 replies
    Latest over 7 years ago
    by G. Goodwin L. Pitos
  • Not Answered

    Need Help regarding IOT 0

    • Cortex-M3
    • Mbed
    • Cortex-M
    • Cortex-M4
    • Internet of Things (IoT)
    5292 views
    3 replies
    Latest over 8 years ago
    by Volker Skwarek
  • Answered

    infinite Break Points 0

    • Cortex-M3
    • Cortex-M
    5459 views
    8 replies
    Latest over 8 years ago
    by harshan
  • Answered

    What does this instruction do? 0

    • Armv7-A
    • Armv7-R
    • C
    7017 views
    7 replies
    Latest over 8 years ago
    by Juha Aaltonen
  • Answered

    Please explain non-temporal example in programmer's guide +1

    • Cortex-A
    11500 views
    9 replies
    Latest over 8 years ago
    by daith
  • Answered

    If an arm core doesn't support VFP, so it cannot support float number compute? 0

    • Cortex-A
    3322 views
    1 reply
    Latest over 8 years ago
    by Chris Shore
  • Not Answered

    Cortex-A5 sets instr_pc to 0x00000008 after enabling MMU and using high exception vectors 0

    • Armv7-A
    • Cortex-A5
    • arm926ej-s
    • Cortex-A
    • Armv5
    11853 views
    14 replies
    Latest over 8 years ago
    by Yasuhiko Koumoto
  • Answered

    Basic tests on Cortex-A9, Cortex-A5x 0

    • Cortex-A9
    • Cortex-A5
    • Cortex-A
    4236 views
    1 reply
    Latest over 8 years ago
    by Chris Shore
  • Answered

    updating CPSR in USER UNPRIVILEGED mode 0

    • Armv7-A
    • Cortex-A
    • Cortex-M
    • Cortex-M4
    12584 views
    10 replies
    Latest over 8 years ago
    by Gopal Amlekar
  • Answered

    Exception priority behavior 0

    • Cortex-R.Cortex-R4
    • Armv7-R
    4831 views
    6 replies
    Latest over 8 years ago
    by Yasuhiko Koumoto
  • Answered

    Question about application of PendSV 0

    • Cortex-M
    • Cortex-M4
    23790 views
    8 replies
    Latest over 8 years ago
    by Gopal Amlekar
  • Not Answered

    Predication. 0

    • predication
    • instruction
    4722 views
    4 replies
    Latest over 8 years ago
    by Mazen Ezzeddine
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