The most appropriate method of implementing push and pop operations depends on the nature of the engine used. I consider a number of possible solutions for the AArch64 port of Google V8 JavaScript engine…
When reading assembly-level code for any of the AArch32 or AArch64 instruction sets, you may have noticed that the stack pointer has various alignment and usage restrictions. These restrictions are part…
Note: This was originally published on the 14th of February 2012 at blogs.arm.com.I have recently been using the ARM Streamline profiler to study the behaviour of Mozilla Mobile Firefox (code-named Fennec…
In this blog we run through branch and call sequences to explain what they are and how to use them as well as interworking branches between Arm and Thumb Code.
Page colouring is sometimes used as an optimization but as a result of the cache architecture some ARMv6 processors actually require the allocator use page colouring. This article will explain why the…
Armv8 deprecates the use of the it instruction to make anything other than a single 16-bit instruction conditional. This affects many of the examples in this post.
Arm implements conditional execution using a set of flags which store state information about a previous operation. in this post I shed some light on the operation of these flags.
Ideally caches act as magic make-it-go-faster logic sitting between processor cores and memory banks. But there are cases where cache behaviour must be considered to get the desired result.