Avery Design Systems’ co-simulation design verification solution that integrates SystemC-based Arm virtual platforms with a SystemVerilog environment.

Arm Cycle Models and Arm IP Exchange are now End-of-Life, understand what this means to you.

The newly announced Arm IP Explorer platform represents a step-change in efficiency for the IP selection process when defining a custom System on Chip (SoC).

In this blog, read about the AMBA ATP 3.1 release for programmable traffic generation.

In this blog, read about upgrading to 22nm in your ASIC design feature.

Following the release of the AMBA Adaptive Traffic Profiles (ATP) Specification, we are pleased to announce the AMBA ATP Engine, to further facilitate ATP’s adoption into a variety of platforms.

Arm Cycle Model Studio (CMS) is a great tool to create SystemC simulation models from Verilog RTL source code. This articles shows how to use Docker to run CMS and create models on an Ubuntu machine.

This blog presents examples of AMBA ATP adoption and the benefits that Arm and its ecosystem partners deliver.

AMBA ATP is a framework designed to generate synthetic stimuli in a simple way. It is for hardware and software engineers needing to design or debug systems and modules that are compatible with AMBA specifications…

Television systems are entering a new and revolutionary era. Higher resolution video, vastly expanded services, and new AI-powered functions will drive user demand and unit growth.

Arm announces a new online training topic, Arm GICv3/v4 Essential. The course brings the subject of Arm’s Generic Interrupt Controller (GIC) architecture specification to life.

Arm POP IP adds value in four key ways, helping you keep up with the cadence and bring the latest Arm processor cores to market.

Arm created the Arm Approved Design Partner Program (AADP) in 2016 to enable partners to turn their product concepts into working silicon more quickly. While the program was conceived to assist new customers…

We are pleased to announce a new online training topic - Arm Cortex processor behavior.

During the 2018 TSMC Technology Symposium USA event, Arm’s Physical Design Group introduced its development plans for the Artisan physical IP portfolio on TSMC’s 22nm ultra-low power (ULP) and ultra-low…

If you are heading to E-18, Denmark's largest electronic fair, be sure to visit the Arm booth (#4239, Hall C).

This blog will address common questions that we get from customers when talking about virtual prototypes for software development. Let’s start with virtual prototypes!

Black Pepper is one of those go-to spices that can bring out exciting new flavors in any recipe. So, imagine how I felt when I heard Black Pepper Technologies was joining Arm as the tenth Arm Approved…

Arm and Samsung Foundry have announced the first 7LPP (7nm Low Power Plus) and 5LPE (5nm Low Power Early) libraries for the extreme ultra-violet (EUV) lithography.

Arm and Samsung Foundry announce their plans for Artisan Physical IP at the 11LPP (11nm Low Power Plus) FinFET node.

Arm and Synopsys extend collaboration including a subscription agreement for access to Arm IP and launching a worldwide free tech workshop series.