Part 2 in a four part blog describes a more systematic approach to measuring and validating the system performance of these types of systems and introduces new tools to make this systematic approach practically…
FinFET implementation differences – planar to 3D
By chris.wright and Rupal GandhiWe are part of the team that recently taped out a finFET testchip. It was one of our team’s first experiences with finFETs and we saw firsthand the implementation differences…
How to Measure and Optimize the System Performance of a Smartphone RTL Design
This four part blog describes a more systematic approach to measuring and validating the system performance of these types of systems and introduces new tools to make this systematic approach practically…
Standard Cell Benchmarking: Avoiding Five Common Pitfalls
Standard Cell Benchmarking: Avoiding Five Common Pitfalls
Proper evaluation of standard cell libraries should lead you to select standard cells that will optimize power, performance and area for your…
A simple way to estimate the total power consumption of memories in an SoC
Memories are increasingly occupying more area in today’s SoCs. So, it is imperative to have an early estimate of the total power consumed by the memories. Memory power consumption can be divided into two…
ARM Cortex-A57 on TSMC 16FF is real and alive!
Hello there!At this year's TSMC OIP event, I presented “Optimizing Cortex-A57 for TSMC 16nm FinFET” and it was a packed auditorium.I would like to thank ARM, TSMC and Cadence for such an impressive colloboration…
ARM Cortex-A57 Test Chip on TSMC 16nm FinFET Process Optimizes Tools & Flows
Taking a major step forward for advanced-node semiconductor design, ARM and Cadence recently (April 4, 2013) announced the first implementation of an ARM® CortexTM-A57 processor on the TSMC 16nm FinFET…
ARM Cortex-A57 — So Big is Relative but How Relative is Your Big?
Big gives the impression of being large as in size, height, width, or amount: a big house; a big quantity. We've heard of big brother, big bang, or the notorious wrapper B.I.G. aka Biggie Smalls (after…
Performance Analysis and Verification of SoC Interconnects
In the world of the System on Chip (SoC) end users have come to expect a richer web experience, full HD video, full HD gaming and sophisticated applications leading to embedded processors becoming more…
BCD - The Most Interesting Process Technology You Haven't Heard Of
Working at Arm, I often have a unique and early vantage point to trends that are shaping the semiconductor market. One of the most interesting emerging trends is Bipolar CMOS DMOS (BCD) process technology…
An Advanced Timing Sign-off Methodology for the SoC Design Ecosystem
The System-on-a-Chip (SoC) ecosystem spans the gamut of designs from high-end servers to low-power mobile consumer segments. A large and heterogeneous set of players (foundries, IP vendors, SoC integrators…
ARM and Mentor Partnership Improves SoC Test
During the ARM® -Mentor® seminar Tuesday, July 17, the nearly 100 attendees heard about the goals and ambitions of the long-term partnership between Mentor and ARM to improve testing of ARM cores…
The Chinese Semiconductor Market: Rapidly Accelerating
At just under 14 minutes, with a top speed of 300km/hour, my commute to an airport on public rail transportation has never been faster! I wasn't on the high-speed public rail systems that typically come…
Early Power, Performance, Area Analysis & AMBA Designer: A Winning Combo
Power, performance and area or "PPA," as it is called, has become a universally interesting topic to system-on-chip (SoC) designers around the world. Atrenta -- an ARM Connected Community…
Designing an ARM Based SoC: How to Meet Your Power Budget
ARM IP and ARM processor usage is pervasive across multiple segments of the electronics industry. As shown in Figure 1, each of these market segments have unique design challenges and analysis drivers…
Power Management – What to Look for When Selecting Memories
Mobile devices and many electronic systems are powered by batteries. In such systems, optimization of power is a key design constraint. In fact, it is more accurate to look at total energy usage. System…
Low Power and Its Future?
Five years ago, ARM R&D Fellows Dr. Robert Aitken and David Flynn predicted [LS1] several low power design and implementation techniques which were discussed in detail in their book (co-authored by…