I would like to use iMX6 in asymmetric mode (Windows EC7 + Linux). Is that anyhow possible? Marco

One of my customer is considering to use Cortex A9 dual core device for a computational intensive task (For the sake of discussion, lets assume an high end

image analysis task). Due to cost or other over head reasons, he/she does not prefer to use an RTOS…

Hi,

I'm currently working on a project based on the Arria V SoC FPGA (ARM Cortex-A9 MPCore). The goal of this project is to run a high speed ethernet link.

For some reasons the customer don't want to use a Linux kernel on the ARM. His wish is to have…

We've been using TI's Panda board but it seems to give us quite a bit of trouble.  As a result we can't profile the information that we would like.  Does anyone know of any other development boards out there that has a Cortex-A9 on it?  And what experiences…

These days I'm using Xilinx SoC to design a software, which shares memory between Cortex-A cores and FPGA.

I've tried reserve memory in Linux and mmap() /dev/mem. The problem is if I use O_SYNC, it very slow since

my software access every byte computed…

Hi All!

I am working with a Xilinx Zynq 7000 SoC which uses the Cortex A9 as a CPU.

I've observed a problem wherein a section of memory marked strongly-ordered and non-cacheable (0xc02) in the MMU table gets corrupted by what appears to be L1 evictions…

Hi,
I am using I.MX6Q Sabre sd board (cortex-a9 ). I am trying to build custom image with my own start script and ld script. The image is to be loaded with u-boot. Where should i place the Interrupt vector table? Now, when i reffered the "1.1.0_iMX6_Platform_SDK…