• Error in AMBA 5 CHI spec?

    David Zuo
    David Zuo

    P189, 5.2.1 Dataless transaction without memory update

    Why does RN-F0 transition I->UC, rather than UCE or UD? After MakeUnique, RN-F0 has obtained the right to modify the cache line by discarding all other copies, dirty or not, in other caches. The purpose…

    • over 1 year ago
    • System
    • SoC Design forum
  • Hazard conditions in CHI

    David Zuo
    David Zuo

    In chapter 4.9.2 At the ICN(HN-F) node CHI specification talks about what ICN should do when there is hazard condition. It says:

    One example of these rules is chapter 5.6.1 CopyBack-Snoop hazard at RN-F, Figure 5-22 CopyBack-Snoop hazard at RN-F exa…

    • over 1 year ago
    • System
    • SoC Design forum
  • How to understand Exclusive Transaction failure conditions in CHI?

    David Zuo
    David Zuo

    The purpose of Exclusive Access is to read, calculate and modify a cache line atomically. The built-in Atomic Transactions can do some basic calculations at ICN or SN, but if more complex operations are necessary, Exclusive Access is needed.

    CHI specification…

    • over 1 year ago
    • System
    • SoC Design forum
  • Introducing AMBA 5 CHI protocol enhancements: Specification now available

    Jeff Defilippi
    Jeff Defilippi

    In 2013 Arm announced the AMBA 5 CHI protocol to provide the performance and scale required for infrastructure applications such as networking and data center. The protocol has been highly successful and has been the foundation for Arm many core systems…

    • over 3 years ago
    • System
    • SoC Design blog
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