Hi Experts,
What is the practical use of self hosted debug provision in the ARM V8 architecture ?
What are all the exceptions arrived and how it is handled ?
Regards,
techguyz
Hi Experts,
What is the practical use of self hosted debug provision in the ARM V8 architecture ?
What are all the exceptions arrived and how it is handled ?
Regards,
techguyz
Hi Experts,
Does the EL3 and EL2 usage is the purely implementation specific or even though EL3 is implemented is it possible to disable EL3 and EL2 in software ?
Regards,
Techguyz
We are very pleased to announce a new online training topic - Machine Learning using Arm.
This training topic covers essential information on Arm’s IP solutions for optimizing Machine Learning (ML) applications for Arm hardware. The…
Hi all,
I would like to use RTOS in my project in NVIDIA Jetson TX2 developer kit. But all of them are expensive. And i tried Real-Time Scheduling with NVIDIA Jetson TX2 by installing preempt RT patch. But the patch is not %100 hard real time. And i do…
I work on software that needs to know the processor and cache details. On x86 systems it uses the CPUID instruction to know about the processor family/model (Skylake, Icelake etc) and cache details (total size, line size, associativity etc). I am trying…
Hi,
In my system (CycloneV - 2 cores of Cortex-A9) I require large DMA transfers, and currently I can't connect DMA via ACP, so cache coherency becomes SW problem. I know that the proper way of doing it under Linux is using the DMA-MAPPING API, and…
I have found a low priced ($47 qty. 1) ARM-A9 Dual Core 1GHz Thin Client board that currently has an Embedded Linux OS along with an RDP 7.1 client. There is an SD slot used to upgrade this board with different firmware. Is the process for jumpstarting…
Hi Sirs,
I got a question about the way Linux 3.18 defines the "writel()".
In linux-3.18/arch/arm64/include/asm/io.h, it describes:
/*
* I/O memory access primitives. Reads are ordered relative to any
* following Normal memory access. Writes are…
Hi,
I have an arm cortex A-57 machine that is running 3.16 linux kernel (64bit) compiled using gcc-linaro-aarch64_be-linux-gnu-4.9-2014.09_linux toolchain.
My application (32bit) is accessing a member inside a structure at unaligned address using pointer…
I'm wondering how I could use 'armlink' to combine or merge a binary image into another image. With the ARM GNU tools, I can do the following:
1) Perform a partial linking (switch '-r') of as input file in binary format (switch '-b binary…
Hello everyone!
I want to buy STM32F103C8T6 and my os is Ubuntu and I don't want to use IDEs. I already found the developer's tools - GNU Arm Embedded Toolchain, but have the question - there is a suitable linux software to program ARM devices…
The Energy Aware Scheduler (EAS) is now available as part of Linux 5.0. It enables energy-efficient scheduling decisions on big.LITTLE and DynamIQ Arm platforms by choosing the right type of CPU for each task.
EAS is an extension of the…
Hello!
I am currently working on creating a shared virtual address space in Linux arm64 on a Xilinx Zynq Ultrascale+ board. In the future it should be possible to share pointers/addresses between the Cortex A53s and the FPGA utilizing the built in ARM…
Hi,
I am new to the forum and also to the community. I am trying my best to reach out for help yet meeting the standards of the community. I have been working on ARM Cortex A9 MPcore processors that are on-board the Zedboard ( which is a Zynq Evaluation…
Valgrind is a GPL'd framework for building simulation-based debugging and profiling tools, plus a set of "standard" tools. The best known of these is Memcheck, a memory error detector, but in fact it is only one of eight tools in the standard distribution…
My previous post provided an introduction to the concept of memory access ordering. It did not however provide any solution to the problem, or necessarily specify where such ordering can be significant.
Now, not all software developers need to be deeply…

BOSTON—The data center is being re-architected to automate and accelerate the delivery of services while accommodating the massive influx of data, to achieve this IT modernization hardware underpinnings are being abstracted away from programmers who…
Hi all,
I am trying to connect to the RPi2 JTAG.
I have the following setup
- Raspberry Pi 2 running Raspbian 8.0 (Jessie)
- OpenOCD 0.9.0 with a J-Link EDU connected to a Ubuntu system.
I setup the GPIO in order to expose the JTAG interface and the…
Hello everybody,
I am new to Assembly programming and I would like to learn it.
Could you advise me which (e)books I should start with and the software I can use on my Raspberry Pi B 2.0 running Debian?
Thanks!
I'm measuring worst case execution time of an application. I would like to flush L1, L2 (Instruction and Data) cache and then begin my measurements.
Is it doable from user mode?
Processor: ARM Cortex A9
OS: Linaro Linux
Hello, everyone.
Let me post a question regarding booting Linux on ARM FVP (with Cortex-A9 MPCore).
I'm setting up an experiment which uses TrustZone on ARM FVP. I'm not sure which
kernel to run in the secure world, but am sure to run Linux in Normal…
Dear experts,
I am currently trying to measure the cycles required to context switch between two linux processes and the cycles required to world-switch between two linux VMs running above a thin bare-metal hypervisor. For this purpose, I am using the…
Hi there,
I have been going through a lot of ARMv8 documents, and I have a very basic question:
-Can I take a Linux Kernel, compiled for a ARMv7 device, and run it on an ARMv8 device in Aarch32 execution mode?
( Lets assume that the two SOCs are identical…
Hi, Sorry if this is a long thread but i'm really confused.
I program for AVR MCUs and also know about Arduino, I can program for different ATMEL MCUs with looking at datasheets, And i also programmed a few basic stuff on Cortex-M3 LPC1768, without…