When I read below thread in arm forum, I still not clear which one is the safety way.
Cortex-M4: guaranteed wakeup from WFI?
There're two solutions mentioned above, using WFE instead of WFI, and swap __WFI() and __enable_irq().
I can understand WFE…
When I read below thread in arm forum, I still not clear which one is the safety way.
Cortex-M4: guaranteed wakeup from WFI?
There're two solutions mentioned above, using WFE instead of WFI, and swap __WFI() and __enable_irq().
I can understand WFE…
Hi to you all,
I've a firmware running on a NXP LPCLink2 (LPC4370: 204 Mhz Cortex M4 MCU) board which basically does this:
Hi.
I have a question regarding Cortex-M4 processor with floating point unit. Is it somehow possible to do some computation in parallel in CPU (with integers) and FPU (with floats)?
Probably not, because both units need their own instructions to perform…
Core: Cortex-M4F
Do I need to configure vector table offset address to 0xnnnn_n000?
In case of 0x3080(Flash region), the program jump to unexpected code.
I think it is caused by mismatching between vector number and handler address.
In case of 0x3000(Flash…
Hi.
We are developing a product which has to achieve some safety requirements. The system is quite simple, non-OS, running in a Privileged mode only on a Cortex-M4. I would like to implement a Memory Protection Unit somehow. Could you please give any advice…
Hi.
I am writing back regarding MPU usage. I implemented it into the software in next ways (note, that program is quite simple - only privileged mode, no RTOS):
1. I enabled background region, thus all addressable memory is fully accessible, unless there…
Hi
I had a problem.
I can use vfp in user mode but not work in priviledge level.
Is there any wrong setting in CP10 , CP11 or any other wrong setting??
BR
Hi,
I think I am just getting confused with this even if (or because of) I read the book and manuals again and again.
At exception entry, the processor saves R0-R3, R12, LR, PC and PSR on the stack. Saving PC means that the address of the instruction to…
I need to be able to handle long bitfields as effectively as possible. Right now I need up to 64 bits in length.
Are there instructions to set, clear and test individual bits in one cycle available for some of the architectures? Which? Particularly, will…
Hi, Sorry if this is a long thread but i'm really confused.
I program for AVR MCUs and also know about Arduino, I can program for different ATMEL MCUs with looking at datasheets, And i also programmed a few basic stuff on Cortex-M3 LPC1768, without…
sir,
I am working with SWD(serial wire debug protocol) on cortex m4 architecture, one thing i don't understand that i am unable to write value into registers r13 and r14 the remaining registers all are updating but for r13 and r14 i am unable to…
as we know supervisor mode is priviliged and user is not. at reset time in debugging mode, i read the cpsr it is 0x1d3 means in supervisor mode, so i can change CPSR so i changed it to 0x1d0 which is user mode, since user mode is unpriviliged so i must…
I need some indications to begin writing a program.
Write a compare routine to compare 64-bits values , using only two instructions.
Thanks for your indications !
Hi.
In the page 22 of the document below informs that the cortex-m7 has "zero overhead loops" capability. I would like to know how it is done? Is there a special instruction for it?
http://community.arm.com/servlet/JiveServlet/downloadBody/9595…
Hello I was curious about which ARM launch/starter board would be best used to create an electronics controller for a 32 bit 3D FDM printer? I was thinking that I've seen one project for the TI TM4C123G launchpad that might work. But are there better…
Hi, I make a software for Cortex-A9 and Cortex-M4 (both uni-processor system).
Question.
Is 64bit-aligned STRD(64bit memory access) atomic ?
(I know tha It is not atomic, but i don't know behavior.)
For example:
LDR R2,=buff
mov R0, #1
mov R1, #2
STRD R0…
I've been seeing situations where I want to take a 32bit array of 32 elements and copy it so that all the bit 0s are copied into element 0, bit 1s copied into element 1, etc for all 32 elements. This is always the processing bottleneck for applications…
Hi there,
I am getting a hard fault for accessing an unaligned memory address with STR single word access on a cortex M4 processor (Infineon XMC4500 F100k1024). Cortex M4 manual says that:
Hi all,
I did some of the investigation based on comparison of FPU based algorithms on CM4 and CM7 cores. All the code/data were placed into the single cycle memory with full utilization of modified / true Harvard architecture, it means:
- on CM4 - code…
Hi,
Assume system configuration is: CM4 in a switchable power domain and WIC in always on domain. Also in response to "seeldeep" if the power management unit is powering down the CM4 and with no logic retention.
Given this system configuration…
Hi,
in a thumb-assembly file (my toolchain is gcc 4.8), I want to replace a branch with address assignment to the program-counter.
So instead of:
b lbl
I want to have something like:
pc = address(lbl)
This solution works. Here, I use the following code to…
Hi,
in the course of developing an SWD debugger, I try to find the necessary components on the Access Ports. Through the CIDRs and PIDRs, I can divide components in being CoreSight components or being Generic IP. My first supported targets will be nR51…
Hi,
I'm working on a Cortex-M4 (STM32F429-DISCO) with the Ravenscar profile, using Ada language.
What I want to do is to trigger a software interrupt from a procedure in a task. This in order to have
the same algorithm, which governs the interrupt…
Using nRF52832 (Cortex M4) and have configured the SWO to output debug printing.
This works fine immediately after programming, but there is intermittent corruption if the debug/programmer is disconnected and the product is power-cycled.
Setup code is…
Hi to you all, I'm using a LPC437 microcontroller (cortex M4) for a real-time application.
I would like to measure the performance of a function I wrote in C, i.e. know how much time does the execution takes.
Unfortunately my LPC4370 is not supporting…