• CMSIS FFT

    jay shah
    jay shah

    Hi All, My Question is related to CMSIS DSP Library. i'm working on ADuCM3029 EZ-KIT. I'm using IAR v7.8.1 to build the project. In my application i have an ADC interfaced with the controller, from which i acquire 60 samples and stores it into the buffer…

    • over 3 years ago
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  • Arm Instruction Set (Thumb-2)

    AbdAllah Talaat
    AbdAllah Talaat

    Hi , I am New to this Community

    I am Studying now Cortex-M3 .. I am reading Joseph Yiu book...

    I am Confused in the part of the instruction set , and I couldn't get the following:

    as i understand that some of the original ARM 32-bit instructions are…

    • Answered
    • over 3 years ago
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  • Where to find the execution cycles of Cortex m7 instruction

    tyskin
    tyskin

    for Cortex-M0, M3 and M4, I can find the execution time in their Technical Reference Manual > Programmers Model > Instruction set summary 里面查看

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0432c/CHDCICDF.html

    but for M7 It said that…

    • over 3 years ago
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  • What is the relationship between UART and printf within retarget?

    ele
    ele

    HI.

    I'm trying to understand the relationship between UART and printf within retarget.

    as I understand, retarget supports to implement low level function fputc, if I want to use printf().

    if I am right, I can't still understand the relationship between…

    • over 3 years ago
    • Processors
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  • Where could I find a good start for studying Memory Types and Attributes as well as Monitors and semaphores ?

    AbdAllah Talaat
    AbdAllah Talaat

    Hi I was studying the memory system ... and I found three related concepts/topics but I couldn't grasphow these concepts are related to each other and to the AMBA Protocol ... these concepts are : - memory Type - memory Attributes - Monitors and semaphores…

    • Answered
    • over 3 years ago
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  • Detect RESET cause on Cortex M3 (STM32F107)?

    Terje
    Terje

    Hi.

     

    I have a problem HW-resetting an external HW-circuit on my PCB (my MCU is STM32F107):

    Because the POWER to my HW-circuits arrives later that to my MCU, I need to (re-) generate a delayed RESET-signal from my MCU towards the RESET-pin of the external…

    • Answered
    • over 3 years ago
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  • What is the difference between sparse and full example of cmsdk_ahb_busmatrix?

    ele
    ele

    Hi.

    As I know Cortex M3 design kit have lots of  stuff IP. one of those things is cmsdk_ahb_busmatrix.

    But I want to know does cmsdk_ahb_busmatrix supports AHB-full specification? or just supports AHB-LITE?

    I'm confuse that because there some example explained…

    • Answered
    • over 3 years ago
    • Processors
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  • make talk two ARM Cortex M3 each other using WiFi or Bluetooth.

    gauravcdac
    gauravcdac

    9Hi,

    I want to develop a system with ARM Cortex M3  (LPC 1768 or LPC1343) can talk to each other ysing wifi module or Bluetooth Module. Plzz help in this contex as i am new toi ARM

    • Answered
    • over 3 years ago
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  • How cortex-M4 handles data hazard situations in the pipeline?

    HimanshuDoshi19
    HimanshuDoshi19

    Hello to all,

    Since I am working on ARM Cortex-M4, I would like to know about the handling of the hazard situations (especially the RAW, WAR and WAW hazard situations) in the pipeline.

    Is the processor also use the method of "Forwarding" in order to handle…

    • Answered
    • over 3 years ago
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  • How does memory work in cortex M3?

    ele
    ele

    Hi 

    Now I'm trying to understand about memories in the Cortex design kit.

    I came across memory address map of cortex M3 when I googling as the below.

    In the image, left one is an AHB memory map, and right one is STM32F103's memory map.

    As you…

    • Answered
    • over 3 years ago
    • Processors
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  • How to use compiled Hex file from Keil on windows to the design_start?

    ele
    ele

    Hi,

    Thanks for your supporting in advance, As I know M0 or M3's design start kit have some example which is firmware such as Hello.

    If I compiled that Hello firmware in the window, then can I use directly into the design start kit? or should I need…

    • Answered
    • over 3 years ago
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  • How does matrix4x2 implement in busmatrix?

    ele
    ele

    Hi,

    Currently I'm digging the bus matrix 4x2 bus matrix from 

    But I have some question.

    How does the bus matrix4x2 implement in bus matrix?

    I just draw what I've understand it as the below

    Am I understanding correctly?

    I want to understand internal…

    • Answered
    • over 3 years ago
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  • LPC1768 Interfacing with USB HDD

    hmesut
    hmesut

    I want to Interfacing LPC1768 with 1TB External USB Hard Disk

    Can LPC1768 support it?

    I don't know how do it

    please help me . i really need it and it's very important

    • Answered
    • over 3 years ago
    • Processors
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  • What happens if a same priority exception came while context-switch is executing?

    kaizsv
    kaizsv

    Hello, I meet a problem while using Spin Model Checker to verify a RTOS kernel based on Cortex-m3 platform.

    My PendSV is in the lowest priority 16 and perform to schedule next user task and context switch. While PendSV is executing, another exception…

    • Answered
    • over 2 years ago
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  • How do I implement the cortex M3 Boot ROM code?

    ele
    ele

    Dear All,
    As I know, In Cortex M3, was implemented such as the B_ROM, I_RAM, D_RAM .
    and Basically, Cortex M3 is consist with internal memory ROM and SRAM.
    In Boot sequence, first of all, IROM code load BL1 code into the SRAM.
    So I want to know especially…

    • Answered
    • over 3 years ago
    • Processors
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  • Interrupt switching during Late Arrival- CortexM3

    Vartika Singh
    Vartika Singh

    In Cortex-M3 manual, it is mentioned that during Late Arrival, when low-priority interrupt (LP) has already pushed 8 registers to Stack and high-priority interrupt (HP)occurs then, for (HP), we don't need to do any state saving. What does it mean by …

    • Answered
    • over 2 years ago
    • Processors
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  • How to start accessing the flash rom on Cortex-M3 design kit by JTAG?

    ele
    ele

    Hi,

    I'm trying to simulate which is accessing the flash rom on Cortex m3 design kit by JTAG?

    Is there any related test case or example?

    How to start accessing the flash rom on Cortex-M3 design kit by JTAG?

    • Answered
    • over 2 years ago
    • Processors
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  • MPU is not triggering MemFault or HardFault

    Muzahir
    Muzahir

    MPU is not triggering MemManage fault. I want to protect a memory region of 64 bytes starting from 0x20000000. I've configured the MPU registers accordingly, but when I write in a protected memory location, MPU does not trigger fault.

    Here's a code…

    • Answered
    • over 3 years ago
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  • Forced Hardfault (INVPC) Exception Error

    Lokesh
    Lokesh

    Using ARM coretx-M chip set

    Getting random  INVPC hard fault exception error, while running iperf tool for measuring n/w throughput.

    Hard fault reg: 0x40000000

    xPSR: 0x01000000

    PRIMASK: 0x00000001

    CONTROL: 0x00000000

    Please help to find the possible root…

    • Answered
    • over 2 years ago
    • Processors
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  • How to interface TFT display with lpc1768

    chinna@422
    chinna@422

    I am new to lpc1768, i facing problem in how to start interfacing TFT mr024-9325-51p 2.4" DISPLAY . please help me in that. if anybody provide example code that will help me alot. thank you.

    • Answered
    • over 2 years ago
    • Processors
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  • Does Cortex-M3/M4 continue with burst in response to ERROR?

    MSaif
    MSaif

    AMBA spec states that 'Master can choose whether to terminate current burst or continue with burst in response to ERROR'.
    What does Cortex-M3/M4 do in response to ERROR? Does it continue with burst in response to ERROR in some special cases?

    • Answered
    • over 2 years ago
    • Processors
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  • Cortex M3, PrimeCell uDMAC bus arbitration

    acoad
    acoad

    Hi,

    This is in the context of the Cortex-M3 and PrimeCell uDMAC as implemented in the Texas Instruments CC2640R2F Bluetooth controller (I have gone through the TI support forums for this question but it seems that this is fully within the ARM IP domain…

    • Answered
    • over 2 years ago
    • Processors
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  • Does Documents have release Notes or update history?

    MR.Smile
    MR.Smile

    The G version has 410 pages!

    However, the H version reduce to 133 pages!

    It's like a big lost! 

    what's difference between the older and newer version?

    I think it's the ARM job to tell the difference. It's hard and wasting time for the user to…

    • over 2 years ago
    • Processors
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  • DMB, DSB, ISB on Cortex M3,M4,M7 Single Core parts

    Trampas
    Trampas

    I have been reading through the ARM documentation on memory and instruction barriers. 

    I have read that the single core ARMv7-M parts do not reorder instructions, as such the DSB and ISB are not needed, is this correct? 

    I have also read the same about…

    • Answered
    • over 2 years ago
    • Processors
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  • Interruptible Instructions on Cortex-M4

    praffeck
    praffeck

    The ARM Cortex-M4 Processor Technical Reference Manual states:

    To minimize interrupt latency, the processor abandons any divide instruction to take any pending interrupt. On return from the interrupt handler, the processor restarts the divide instruction…

    • Answered
    • over 2 years ago
    • Processors
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