• Unhandled fault: alignment fault (0x92000061) at 0x00000000fff0f729

    rpulluru
    rpulluru

    Hi,

    I have an arm cortex A-57 machine that is running 3.16 linux kernel (64bit) compiled using gcc-linaro-aarch64_be-linux-gnu-4.9-2014.09_linux toolchain.

    My application (32bit) is accessing a member inside a structure at unaligned address using pointer…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Development in Assembly Language

    AnthonyPaulO
    AnthonyPaulO

    Does anyone know where I can find the toolchain for developing apps on an A57 (Raspberry Pi 3) in Assembly Language? I am looking in particular for a Windows toolchain that will allow me to cross compile, but I'll take anything at this moment since all…

    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • How machine learning at the edge is helping to save Rudolph this Christmas

    Jack Melling
    Jack Melling

    Obviously, Father Christmas – or Santa Claus or whatever else he’s known as – is real. Whoever tells you otherwise is either misinformed or simply a liar. However, he can only deliver all of the presents for children around the world in just one evening…

    • over 1 year ago
    • Processors
    • Processors blog
  • L2 TLB internal memory access through RAMINDEX

    Amitra29877
    Amitra29877

    Hi Experts,

    I need to access L2 TLB internal memory for A76 core (Section A6.6 of Cortex A76 TRM) . I was searching for an example code and found this for A57 core:

    LDR X0, =0x0000000001000D80
    SYS #0, c15, c4, #0, X0
    DSB SY
    ISB
    MRS X1, S3_0_c15_c0_0…
    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Can we reset L2 subsystem for cortex-A57?

    MarekBykowski
    MarekBykowski

    My system hosts 4x clusters, each with 4x cpus A57 connected through interconnect CCN504. I have a special case in which I need to reset L2 sybsystem (L2 is 2MB in my case) from inside SPL Uboot running from a static memory. The memory is attributed to…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • What Arm Achieved by Graduating to a Formal Sign-Off Methodology

    Rob van Blommestein
    Rob van Blommestein

    At Oski, we’ve embedded ourselves in the world of Formal verification because we truly believe in the exhaustive nature of Formal to achieve significant confidence in design and verification sign-off. So, it doesn’t surprise me that Arm’s initial experience…

    • over 3 years ago
    • Processors
    • Processors blog
  • Armv8 Memory Mapping

    AnthonyPaulO
    AnthonyPaulO

    I am looking to emulate an Apple II and would like to specify some address ranges as being memory mapped so that any access would result in perhaps an interrupt that I am then able to handle and in which I can determine the memory address being accessed…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Using an external clock - experts only

    AnthonyPaulO
    AnthonyPaulO

    I'm looking to emulate a 6502 on the ARM but I would like to make it cycle accurate so I need some way to interface to an external clock. I can't rely on an internal clock as there are external components that will rely on the external clock as well and…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Booting bare metal application on cortex A57 with u-boot

    Gokul
    Gokul

    Hi,

    I am using ARM cortex A-57 processor and I build image with my own startup code and ld script. The image is loaded with u-boot. When I tried booting the image, it is aborting with following message:

     

    ## Booting kernel from Legacy Image at 48080000…
    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Processor Modes in cortex-A57

    Ajeesh
    Ajeesh

    Hi,

    I have done some basic assembly in Armv7-A processors (cortex A9). The version of ARM supports modes like User, sys, SVC etc. Does the ARMv8 also has the similar modes? Where can i find the details. Please point me to the documents if any.

    Regards…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Porting code from Cortex-A9 to Cortex-A57

    Ajeesh
    Ajeesh

    Hi,

    I have been using I.MX6Q Sabre sd board (cortex-a9 ). I build image with my own start script and ld script. The image was loaded with u-boot. Now i would like to do the Same with Renesas R-Car M3(cortex A-57). How would i go about this? Can i use the…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • How to use generic timer/counter

    Michael
    Michael

    The technical reference manual states that the Cortex-A57 generic timer events are not affected by CPU clock frequency change. My challenge is that I can't use any built in linux libraries to create a delay because whenever I try it clears performance…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • What does PMCEID0_EL0 determine for the the PMU? Performance monitor config

    Michael
    Michael

    The TRM for the a-57 states that PMCEID0_EL0: Defines which common architectural and common micro-architectural feature events are implemented. PMCEID1_EL0 is a continuation of this list. If a bit position is a "1" that means the even is implemented…

    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • How to configure Cortex-A57 PMU

    Michael
    Michael

    I asked this question in a different community space but it seemed like this is a more appropriate home.

    I'm trying to configure the performance counters for the Cortex-A57 and I'm very confused. The technical reference manual alludes to accesses being…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Aarch32 app performance on ARMv8a device

    Sreenath P V
    Sreenath P V

    Hi ,

    I am running aarch32 app in ARMv8a( cortex-a57 ) device.  The performance reports ( using gettimeofday() utility ), showing  large spikes on random calls. But the same app on ARMv7a( cortex-a15 ) device is quite stable.

    Will the aarch32 library…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • How to measure program execution time in ARM Cortex-A53 processor?

    Rajeev Verma
    Rajeev Verma

    Hi,

    I was using following method to read clock in cortex-a15:

           static void readticks(unsigned int *result)

            {

                struct timeval t;…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Cortex-A72 and Cortex-A5x series boards

    techguyz
    techguyz

    Hi Experts,

    Is there any sample development boards available on Cortex-A72/5x series ?

    Regards,

    Techguyz

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Motherboard provider with Cortex-A53 or ARM Cortex-A57

    Giovanni
    Giovanni

    Hello,

    I want to experiment with a storage solution ARM based. Is there any provider actually selling dev kits or consumer boards based on ARM Cortex-A53 or ARM Cortex-A57?

    Obviously the main requirement for purchase is the availability of SATA3 ports for…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • AMD’s Big Bet on ARM Powered Servers: Opteron A1100 Revealed

    wangyong
    wangyong

    It has been a full seven months since AMD released detailed information about its Opteron A1100 server CPU, and twenty two months since announcement. Today, at the Hot Chips conference in Cupertino, CA, AMD revealed the final pieces about its ARM powered…

    • over 6 years ago
    • Processors
    • Processors blog
  • ARM Shares Updated Cortex-A53/A57 Performance Expectations

    wangyong
    wangyong
    1.jpg

    With the first Cortex-A53 based SoCs due to ship in the coming months, and Cortex-A57 based designs to follow early next year, ARM gave us a quick update on performance expectations for both cores. Given the timing of both designs we'll see a combination…

    • over 6 years ago
    • Processors
    • Processors blog
  • A Walk Through the Cortex-A Mobile Roadmap

    Brian Jeff
    Brian Jeff

    Chinese Version中文版

    Introduction

    The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…

    • over 7 years ago
    • Processors
    • Processors blog
  • High efficiency, midrange or high performance Cortex-A - What is the difference?

    Kinjal Dave
    Kinjal Dave

    A question that I am asked many times is – what is the fundamental difference between the high efficiency, mid range and the high performance application processors in the ARM Cortex family?

    The simple answer to this is – the power budget…

    • over 7 years ago
    • Processors
    • Processors blog
  • AMBA 4 ACE and Hardware Cache Coherency - Top 5 Questions

    Neil Parris
    Neil Parris

    I thought I'd post a short blog post about commonly asked questions on AMBA 4 ACE and system coherency.

    What does ACE mean?

    ACE is the "AXI Coherency Extensions" introduced with the AMBA 4 specification released in 2011. For those of you thinking "What…

    • over 7 years ago
    • Processors
    • Processors blog
  • ARMv8 Architecture, The whys & wherefores of AArch64 - 64-bit Applications

    John Goodacre
    John Goodacre

    It’s been a year since ARM announced the first details of the new ARMv8 architecture with its support for 64-bit virtual addressing. This comparatively early announcement allowed the architecture to be discussed publically, and more importantly…

    • over 7 years ago
    • Processors
    • Processors blog
  • big.LITTLE and AMBA 4 ACE keep your cache warm and avoid flushes

    Neil Parris
    Neil Parris

    Updated 29th October 2013


    High performance and power efficiency are critical to the latest mobile devices, and AMBA® 4 ACE™ is a fundamental technology supporting ARM's big.LITTLE processing. In case you missed the announcements, the big…

    • over 7 years ago
    • Processors
    • Processors blog
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