• Cortex-A9: Eviction of dirty line from the region marked as Only "Inner Cacheable" from L1 cache - will if be allocated into L2?

    Hemant
    Hemant

    Hello,

    Consider following scenario:

    1. A 4 KB page starting @0x80000000 is marked as Normal Memory, Inner Cacheable, write-back, non-shareable, non-outer cacheable, L2 is inclusive cache.
    2. Now, the s/w writes to the first word in the page. Let's assume valid…
    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • pc hangs in process of cache setup - Cortex-A7

    Jay Zhao
    Jay Zhao

    In ARM Cortex-A7 platform which includes L1 and L2 level caches,I start cache setup flow as follows:

         1. Enable SMP bit and disable MMU.

         2. Disable I cache in L1, and invalidate it , then enable it.

         3…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Cortex-A8/A15 L1 cache

    Michihiro Yamamoto
    Michihiro Yamamoto

    Hi,

    I would like to know whether the cortex-A8/A15 L1cache has ECC or parity check for error checking, or not.

    I know L2 cache has ECC function. Bur I don't know about L1 cache.

    Please let me know.

    Best regards,

    Michi

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Efficient uasage of PLD instruction in combination with Load instructions?

    josephgopu
    josephgopu

    Hi all,  after a long time I'm back to forum with a question

    I'm posting this question with some pseudo code

    for(i=0;i<100;i++)

    {

    instruction1

    instruction2

    instruction3

    .................

    instructionA : pld [r0]

    ..................

    instructionB :vld1…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Clean Whole Cache on Cortex-A9

    Mark
    Mark

    I am doing some benchmarking and I need to clear the cache before each test. I have this example here:

    Caches and Self-Modifying Code

    However, I just want to clean the whole cache. Is there an easy way to do that? I do not need to know the start and end…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
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