Hi,
I am trying to setup timer at EL1 level and not able to write to CNTP_CVAL register.
I would like to know what is the meaning of "Config-RW" ? It means can be configured ? eg. to be accessed from (NS) EL1 mode ?
If so what/how to configure…
Hi,
I am trying to setup timer at EL1 level and not able to write to CNTP_CVAL register.
I would like to know what is the meaning of "Config-RW" ? It means can be configured ? eg. to be accessed from (NS) EL1 mode ?
If so what/how to configure…
Hi there,
I have been going through a lot of ARMv8 documents, and I have a very basic question:
-Can I take a Linux Kernel, compiled for a ARMv7 device, and run it on an ARMv8 device in Aarch32 execution mode?
( Lets assume that the two SOCs are identical…
Hi All,
I am using ARM v8-A Foundation Platform to debug my code. According to user guide, the base address of UART0 in system is 0x1c090000, so I use the following code to try to print a char via UART0:
*(volatile unsigned char *)(0x1c09000 + offset_of_tx_fifo…
Hi Experts,
ARMv8 MMU TTBRn_ELx registers are banked by exception level.
In "DDI0487A_b_armv8_arm.pdf" page 1640, the controlling register of secure EL1&0 stage1 is TTBR0_EL1
and Non-secure…
Hi all,
I have two questions about ARM Trusted Firmware. I suppose that I already have answer for one of them..
hi experts,
ARMv7 spin-lock use 'WFE' instruction to wait for lock release and use 'SEV' in spin-unlock to notify all cores.
but ARMv8 use 'SEVL; WFE' instructions in spin…
Hi all,
ARMV8 has number of exception levels as EL0 , EL1, EL2, EL3 .. How this is managed and what is the exact use case of the same ?
Hi all,
The generic timer feature is provided in the V8 manual. Is it optional like GIC or it will be available with processor IP by default like cache, MPU features. Is it operates on CPU clock or it requires separate clock source ?
hi, experts:
I found ARMv8 supported some cryptography instructions.
So:
Is there any sample code demonstrating how to use these crypto instructions?
best wishes,
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