• Emerging Standalone NVM – Moving Beyond the Hype

    Wendy Elsasser
    Wendy Elsasser

    Numerous articles and papers have been written on emerging non-volatile memory (NVM) over the last few decades. These emerging technologies have been hyped as either: 

    1. A DRAM replacement in the optimistic case
    2. A Flash replacement
    3. A new memory tier between DRAM…
    • 7 months ago
    • Arm Research
    • Research Articles
  • Logic-compatible Gain Cell eDRAM: A Real Alternative to SRAM

    Charlotte Christopherson
    Charlotte Christopherson

    Embedded memories are a key component of IoT SoCs and recent applications such as Neural Network Accelerators. Unfortunately, SRAM based embedded memory has a large footprint which often covers more than 50% of the silicon area and is responsible for…

    • over 1 year ago
    • Arm Research
    • Research Articles
  • How to Get the PA instead of IPA from NS OS Kernel Module of an AArch64 device?

    Shengye Wan
    Shengye Wan

    Hi experts,

    Recently I want to conduct one secure-related scanning in TrustZone for some NS kernel memory.

    To do this, I need at first reporting the PA of the memory from NS kernel. My idea is developing a kernel module to achieve the goal.

    I write the 

    …
    • over 3 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • Is OPTEE_OS for Juno using 32-bit arch or 64-bit arch?

    Shengye Wan
    Shengye Wan

    Hi experts,

     

    I'm wondering do you compile the OPTEE_OS in this instruction as arm32 or AArch64? In which script do you set the compiler for the secure OS? ( I checked the file build-optee-os.sh while I find the file exports both compilers so I'm not…

    • Answered
    • over 3 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • How to run my own trusted firmware BL32 on juno r2

    pwdusid
    pwdusid

    Hi, 

    I am trying to use arm trusted firmware with my own BL32 (with 0xFF000000 entry point as specified). I want BL31 switch to my secure world that generate smc (aftersome init) to switch to normal world.
    For that I use this compilation configuration:

    …
    • over 3 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • It’s (Mostly) in the PHY

    Ashwin Matta
    Ashwin Matta

    The memory sub-system is one of the most complex systems in a SoC, critical for overall performance of the chip. Recent years have witnessed explosive growth in the memory market with high-speed parts (DDR4/3 with/without DIMM support, LPDDR4/3) gaining…

    • over 5 years ago
    • Processors
    • Processors blog
  • Why do I need an AMBA 5 CHI Memory Controller?

    Tom Conway
    Tom Conway

    ARM® AMBA® 5 CHI Memory Controllers work in concert with AMBA 5 CHI interconnects to provide controls to optimise data flows between many processors and the DDR memory.  In this blog I am going to tell you a bit more about the work ARM is doing to create…

    • over 6 years ago
    • Processors
    • Processors blog