• Inexplicable performance on big.LITTLE technology (on Android)

    Arundale Ramanathan
    Arundale Ramanathan

    I apologise for the long question, but I am trying to measure performance of different indexing techniques on various platforms, one of which is Adaptive Radix tree.

    I have run tests where the basic steps look like this (c/c++):

    Step 1: Generate or load…
    • over 2 years ago
    • Open Source Software and Platforms
    • Android forum
  • Does the DVFS of mali400mp make sense?

    SunnyBeike
    SunnyBeike

    Hi


    Does the DVFS of mali400mp make sense?

    My platform is ODROID, which equipped with the mali400mp GPU.

    I tried to find out how the GPU affect the power consumption of the platform.

    The CPU frequency and bus frequency were all fixed.

    The mali400mp GPU…

    • over 6 years ago
    • Graphics and Gaming
    • Graphics and Gaming forum
  • Rescaling the Mali-400

    Keith Manns
    Keith Manns

    Hello, newbie right down to the socks here, but have to ask. From what I've seen most arm cpu/gpu are scaled to to what number of GPU it will use.  I have a Allwinner A31S processor on a device that I know that should be Mali 400 MP4, but it…

    • Answered
    • over 6 years ago
    • Graphics and Gaming
    • Graphics and Gaming forum
  • Mali GPU Reading from CPU cache

    maasa
    maasa

    Hi Peter Harris

    In Samsung Exynos 5422, it is mentioned that Mali T-628 GPU is I/O coherent with A15 and A7 CPU and GPU can access data from CPUs cache

    I want to measure the time it takes for the Mali GPU to read from the CPUs cache (A15 or A7). Can…

    • over 2 years ago
    • Graphics and Gaming
    • Graphics and Gaming forum
  • L1 data cache and unified cache disabled in AMP mode for Cortex-a7

    Ashwin
    Ashwin

    Hello Guys,

    in my system ( multi core cortex- a7 ), I do not want to be in SMP mode that means it is AMP mode and i need to clear the ACTLR.SMP bit to be in AMP mode but the strange thing which i found though cortex-a7 MPCore TRM is that , those L1 data…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • ARM Cortex-A7 generic timer

    hostia
    hostia

    Hi ARM expert,

        I am trying to use generic timer, but seems the generic timer wasn't enabled. My steps are:

    1. Set CNTFRQ with 1MHz
    2. Set CNTP_CVAL with 100
    3. set CNTP_CTL with 0x00000001

       4. Read CNTP_CTL in a loop, wait for bit…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • I cannot write the sp register in the monitor mode

    Takumi Shimada
    Takumi Shimada

    I use a Cortex-A7 board and write start up code.

    I try to use Security Extension.

    I use `smc` instruction and make cpu mode monitor mode.

    In the monitor handler, I tried to changed stack pointer value for calling other functions.

    But after execute `ldr sp…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Minimum MMU table size on ARMv8 to map 4GB memory space, in AArch64 mode

    yifanfeng
    yifanfeng

    On ARMv7 Cortex-A8/9/7, to map 4GB memory space, the minimum MMU table size is 16 KB(section mapping). Any possible to map 4 GB memory space with 16 KB MMU table, on ARMv8, AArch64 mode?

    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Does Cortex-A7 have the ability to send a 128-bits exclusive transaction?

    Jay Zhao
    Jay Zhao

    According to related manuals, I see that Cortex-A7 is able to send 8-bits, 16-bits, 32-bits, and 64-bits exclusive access.

    I'm wondering that if it's able to send a 128-bits exclusive access or not.

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • pc hangs in process of cache setup - Cortex-A7

    Jay Zhao
    Jay Zhao

    In ARM Cortex-A7 platform which includes L1 and L2 level caches,I start cache setup flow as follows:

         1. Enable SMP bit and disable MMU.

         2. Disable I cache in L1, and invalidate it , then enable it.

         3…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Cortex-A7 4 Cores Boot

    Kiran Reddy T
    Kiran Reddy T

    Hi ,

    I am working on Arm for the first time . I am trying to implement a scenario to boot 4 cores parallel . I have few queries here

         --> Reset lifting procedure for 4 cores ? how exactly they should behave ? (any doc also fine…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Asynchrous External Data Abort in ARMv7

    chinatiger
    chinatiger

    hi, experts:

    以Cortex-A7 CPU为例:

    如果在程序执行过程中:发生了一个Asynchrous External Data Abort,它会很快进入Data Abort handler吗?

    (Synchrous Data Abort会立即进入Data Abort handler.)

    不清楚Asynchrous external data abort,什么时候才会进入Data abort handler!

    best wishes,

    • Answered
    • over 6 years ago
    • 中文社区
    • 中文社区论区
  • 海思发布Kirin 920八核A15/A7处理器 支持LTE Cat6

    wangyong
    wangyong

    腾讯数码讯(吴彬)北京时间6月6日,来自华为官方的消息,旗下芯片公司海思正式发布了最新的智能手机芯片麒麟Kirin920。

    这款处理器基于28nm工艺制造,采用了目前技术比较成熟的8核big.LITTLE架构,其中包含四颗Cortex-A15核心和四颗Cortex-A7核心,A15核心最高主频可以达到2GHz,两颗核心可以同时工作,处理器支持双通道DDR3L-800MHz,而图形处理器则使用了Mali-T628MP4。

    同时这颗海思麒麟920的SoC集成度相当高,除了中央处理器和图形处理器之外,920还内置了一个名为i3的协处理器…

    • over 6 years ago
    • 中文社区
    • 中文社区博客
  • A Walk Through the Cortex-A Mobile Roadmap

    Brian Jeff
    Brian Jeff

    Chinese Version中文版

    Introduction

    The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…

    • over 7 years ago
    • Processors
    • Processors blog
  • High efficiency, midrange or high performance Cortex-A - What is the difference?

    Kinjal Dave
    Kinjal Dave

    A question that I am asked many times is – what is the fundamental difference between the high efficiency, mid range and the high performance application processors in the ARM Cortex family?

    The simple answer to this is – the power budget…

    • over 7 years ago
    • Processors
    • Processors blog
  • AMBA 4 ACE and Hardware Cache Coherency - Top 5 Questions

    Neil Parris
    Neil Parris

    I thought I'd post a short blog post about commonly asked questions on AMBA 4 ACE and system coherency.

    What does ACE mean?

    ACE is the "AXI Coherency Extensions" introduced with the AMBA 4 specification released in 2011. For those of you thinking "What…

    • over 7 years ago
    • Processors
    • Processors blog
  • big.LITTLE大小核处理器工作原理演示——Quick Office

    Jenny Su 苏琴
    Jenny Su 苏琴

    这段视频介绍了三星 Exynos 5 Octa 5420 芯片的大小核处理器是如何工作的。在开启 Quickoffice 时 8 颗处理器会同时被激活,之后在运行过程中,没有被用到的处理器就会停止工作,以此来减轻功耗方面的负担。在另一个视频中,运行愤怒小鸟游戏的整个过程中基本上只用到了 ARM Cortex-A7处理器,也就是 big.LITTLE 大小核处理器架构中 LITTLE 小核的那部分,大核 Cortex-A15 处理器被激活的次数很少。

    • 60bfb6b58607b_ARM_big.mp4
    • View
    • Hide
    • over 7 years ago
    • 中文社区
    • 视频和文件
  • 白皮书:ARM big.LITTLE 系统的软件技术

    Song Bin 宋斌
    Song Bin 宋斌

    原文下载地址:

    http://community.arm.com/servlet/JiveServlet/downloadBody/2875-102-3-5655/Software_Techniques_for_ARM_big.LITTLE_Systems…

    ARM big.LITTLE 系统的软件技术

    Robin Randhawa,首席工程师,2013 年 4 月

    简介

    移动应用已经发生了显著变化,当今的消费者更多地将智能手机应用于大部分互联生活。其中既包括高性能任务,例如网络浏览、导航和游戏…

    • over 6 years ago
    • 中文社区
    • 中文社区博客
  • The Top 5 Things to Know about Cortex-A7

    Kinjal Dave
    Kinjal Dave

    The ARM Cortex-A7 MPCore processor is the most energy efficient application processor that ARM has ever developed and has dramatically extended ARM’s low-power leadership in entry level smart phones, tablets and other high end mobile devices.  Here…

    • over 7 years ago
    • Processors
    • Processors blog
  • Top things you might not know about ARM processors

    Alban Rampon
    Alban Rampon

    ARM has started what I find an interesting series of presentations giving facts about their products.

    Here is the list so far:

    • Ten Things to Know About big.LITTLE
    • Five things you didn't know about the ARM® Cortex®-A15 Processor
    • Five things you…
    • over 6 years ago
    • Processors
    • Processors blog
  • ARMv7-A - Power to the People

    Chris Shore
    Chris Shore
    Recently, I wrote an article called “Navigating the Cortex Maze” (Navigating the Cortex Maze) That was intended as an easy way-in to the ARM processor range, covering Cortex-A (architecture ARMv7-A), Cortex-R (ARMv7-R) and Cortex-M (ARMv7…
    • over 7 years ago
    • System
    • Embedded blog
  • Multi-threading Technology and the Challenges of Meeting Performance and Power Consumption for Mobile Applications

    Alan Tringham
    Alan Tringham

    The implementation of multi-threading in multi-core processor systems is being heralded as a potential solution to the challenge of achieving ever-higher performance targets with strict limits on power consumption and heat dissipation. This article examines…

    • Multi-threading Technology and the Challenges of Meeting Performan.pdf
    • over 7 years ago
    • Processors
    • Processors blog
  • Fast Models (快速模型) 简介

    George Wang
    George Wang

    概况

    ARM系统的软件开发周期可因等待昂贵的开发硬件而延迟。要在当今的市场中保持竞争力,需要加快在完全验证的系统上开发全功能软件的速度。快速模型就是为这个目的而生。它提供高性能,丰富,准确的程序员视角(Programmer's View)模型库,支持最新的ARM IP。基于模型库构建的虚拟平台模型可使软件开发流程在硬件原型面世数月之前就启动,极大的缩短整个系统的开发时间。


    关键特性

    • 功能准确的ARM指令集模型,被集成进ARM处理器硬件开发流程中进行对比验证
    • 支持ARM多项先进技术,包括高速缓存(Cache…
    • over 7 years ago
    • 中文社区
    • 中文社区博客
<