• Cortex-M Vector Table and Address Remap

    eugch
    eugch

    Hi guys,

    Does the M0 always default to 0x0 when an interrupt triggers? I understand VTOR is not available in M0 for relocation of the tables.

    Can I copy the application vector table just the vector table to beginning of SRAM and remap the SRAM to 0x0…

    • Answered
    • 9 months ago
    • Processors
    • Cortex-M / M-Profile forum