This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”
CMSDK - design multi-master bus
Wenkwei asked: "with the M3 designstart CMSDK, is it possible to design multi-master bus? In the IoT Cortex-M TRM, only an ahb-lite structure is illustrated. That document does mention AHB and APB expansion through INTEXP[1:0] but what if there are more…
- over 2 years ago
- DesignStart
- DesignStart forum
- over 3 years ago
- DesignStart
- DesignStart forum
Cortex-M0 DesignStart processor size (FPGA)?
Dear sirs,
I have a question about the size of synthesized logic for Cortex-M0 DesignStart processor.
When I use ISE of Xilinx to synthesize Cortex-M0 DesignStart processor (version r1p0-00rel0), I have result as below.
(I configure for using Spartan…
- over 3 years ago
- DesignStart
- DesignStart forum
Getting started with the technical discussions
In the last year, hundreds of companies have applied and downloaded the Cortex-M0 DesignStart package and used to prototype their system.
Do you want to discuss about the technical challenges you faced and how you solved it? Or, are you looking for some…
- over 3 years ago
- DesignStart
- DesignStart blog