I am studying the ARM Cortex-M0 DesignStart. I found there are debug port SWDIOTMS and SWCLKTCK in the port list of cmsdk_mcu.v, and there are CPU options which defines the CPU's feature.
I configured the parameter DBG = 1 in the cmsdk_mcu.v Line37…
SWD issue in Cortex-m0
We are using Cortex-M0 DesignStart Pro to design MCU. When we use SWD to download grogram to flash in FPGA(Cortex_m0 mcu inside), we cannot to connect keil with FPGA, and Keil shows:" Could not stop Cortex-M device!Please check the JTAG cable. "…
- over 1 year ago
- DesignStart
- DesignStart forum
Xilinx FPGA Block ROM is used as FLASH and how to load the program in to this?
Hi,
I am using the SoC design from Desgn Start - Eval version for Cortex-M0 with only modification of using Xilinx Block ROM as the Memory for FLASH ROM as well as for RAM.
And my goal is to load the application into the FLASH ROM (Xilinx Block ROM) using…
- over 1 year ago
- DesignStart
- DesignStart forum
How to connect a ST-Link debugger to a Cortex-M1 design
Hi.
I started to play with DesignStart FPGA and implemented example design to a Xilinx Arty board. I successfully imported BSP to Keil, did some changes there and generated a new bitstream. Now I would like to start debug session in Keil, but I don't have…
- over 1 year ago
- DesignStart
- DesignStart forum
Cortex-M0 DesignStart R2
For the last weeks, I have been trying to get this new version to work. I did the same as with the previous version and now it is running on the Xilinx Nexys4. However, honestly I do not have any idea how to get the debugging to work. I defined the pins…
- over 2 years ago
- DesignStart
- DesignStart forum