• why does the loop in Keil run one more time?

    ChangeTheWorld
    ChangeTheWorld

    Hi 

    I use designStart cortex-m3 with ram and rom which inplemented by the internal ram in FPGA board.

    And then I successfully connect it with Keil through JTAG.

    And I try to run the simple function below:

    uint8_t i = 0;
    uint8_t k = 50;
    
    for(i = 0;i…

    • 1 month ago
    • DesignStart
    • DesignStart forum
  • does ARM Cortex-M0 DesignStart support SWD debugger?

    sieg70
    sieg70

    I am studying the ARM Cortex-M0 DesignStart. I found there are debug port SWDIOTMS and SWCLKTCK in the port list of cmsdk_mcu.v, and there are CPU options which defines the CPU's feature.

    I configured the parameter DBG = 1 in the cmsdk_mcu.v Line37…

    • Answered
    • 10402.zip
    • over 3 years ago
    • DesignStart
    • DesignStart forum
  • Cortex-M0 DesignStart Prototyping kit makefiles

    elisorin
    elisorin

    Unlike the Design kit makefiles, in which tool-chain (Keil, DS5 or GCC) can be chosen, the Prototyping kit makefiles uses only DS5.

    Is it possible to receive Prototyping kit makefiles that support tool-chain selection and in particular GCC?

    • Answered
    • over 3 years ago
    • DesignStart
    • DesignStart forum
  • Is there any documentation for design implementation on ARM Keil software?

    Alexis Ogborn
    Alexis Ogborn

    This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • arm cortex m3 designstart debug with st_link.

    chinaboy
    chinaboy

    I download arm cortex m3 prototype  to the CYCLON 5 FPGA .Then use keil to debug the software but when click he debug button ,I encountered an error like the one shown above.

    I don't know how to solve the problem 

    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • how to implement mbed_blinky example on mps+2 board ?

    zhenyuliu
    zhenyuliu

    hi, GUys

       i buy a mps+2 board  and try to implement  mbed_blinky examples. but i meet issues on debugger and download axf files.

         now i can:

            1. export mbed_blinky examples for keil 

            2. compile success and generate axf file

            3. download fail

    …
    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • Program MPS2 with .axf file

    LeChuck
    LeChuck

    Hi,

    I am using the MPS2+ board to debug my DesignStart Cortex-M0. The core is up and running and now I want to program the onboard SRAM. On the SDCard I can see that \MB\HBIO263C\AN387\images.txt expects an axf file.

    Is it possible to generate an .axf…

    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • ARM CortexM3 Designstart on the fpga can't run the compiled c code itself

    chinaboy
    chinaboy

    Dear all

    I encounter a confusion that  I compile a piece a c code and generate HEX file( as instruction rom's initialization file) which is download to the fpga whit the cortex m3 prototype of Verilog code .but the M3 system can't run itself .when I…

    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • Cortex-M0 example system

    pangda
    pangda

    Hi,

    II refer to the example MCU system level in the document "arm_cortex_m0_designstart_eval_user_guide", put it into MPS2+ after synthesis, the software uses the following example in this directory.

    D:\CMPS3\AT510-MN-80001-r2p0-00rel0\systems…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • How to Debug CM3 DesignStart in the FPGA

    hduxiaoye
    hduxiaoye

    I use the ARM Cortex-M3 DesignStart Eval on the FPGA platform, I use J-link to download the program to the system but the system is not properly implemented. I downloaded the generated Hex file via J-link to the FPGA development board via Keil. Is the…

    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • SWD issue in Cortex-m0

    Junyan
    Junyan

    We are using Cortex-M0 DesignStart Pro to design MCU. When we use SWD to download grogram to flash in FPGA(Cortex_m0 mcu inside),  we cannot to connect keil with FPGA, and Keil shows:" Could not stop Cortex-M device!Please check the JTAG cable. "…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • Different Address of Reset Handler!

    jayce
    jayce

    Hi there,

    Why the address of reset handler is different from waveform and assembly code for hello testcase?

    This is obtained after compiling hello.c using Keil uVision 5.

    Reset_Handler
    0x000001c0: 4809 .H LDR r0,[pc,#36] ; [0x1e8] = 0x2a1
    0x000001c2:…

    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • Xilinx FPGA Block ROM is used as FLASH and how to load the program in to this?

    vbandaaru
    vbandaaru

    Hi,

    I am using the SoC design from Desgn Start - Eval version for Cortex-M0 with only modification of using Xilinx Block ROM as the Memory for FLASH ROM as well as for RAM.

    And my goal is to load the application into the FLASH ROM (Xilinx Block ROM) using…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • DesignStart Cortex-M1 non-module files issue with Vivado 2018.2 on Windows 10

    Jinay Mehta
    Jinay Mehta

    Hello all,

    I downloaded the Cortex-M1 DesignStart package for Xilinx FPGAs and followed the instructions given in the training videos. However, the HDL wrapper for the block diagram appears under "non-module files" in Vivado. Due to this I am not able…

    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • Run CM3 hex image in Modelsim

    urian
    urian

    Hi,

    is there some guide which shows how to run a Keil hex mage for Cortex M3 in Modelsim?

    To be more specific, I want to run an interactive simulation in Modelsim of my Cortex M3 design and associated software  to analyse  timings of CPU instructions and…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • Cortex M-3 on Zynq Evaluation and Development Board

    into_embedded
    into_embedded

    I want to run Cortex M-3 soft processor core on ZedBooard. I have downloaded the cortex M-3 IP core, created a deisgn by integrating Zynq Processor with Cortex M-3 processor and generated bitstreams.

    I have also included the provided SW repository from…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • How to connect a ST-Link debugger to a Cortex-M1 design

    Matic Obid
    Matic Obid

    Hi.

    I started to play with DesignStart FPGA and implemented example design to a Xilinx Arty board. I successfully imported BSP to Keil, did some changes there and generated a new bitstream. Now I would like to start debug session in Keil, but I don't have…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • FreeRTOS, Peripheral Modules with DesignStart FPGA

    Jinay Mehta
    Jinay Mehta

    Hello all,

    I have 2 questions regarding the Cortex M IP cores for Xilinx FPGAs (M1 on the Arty A7/S7, provided by ARM)

    1) I am new to ARM DesignStart and am looking to use freeRTOS with the Cortex M1 which project which has been provided for the Arty A7…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum